mirror of
https://github.com/EduApps-CDG/OpenDX
synced 2024-12-30 09:45:37 +01:00
94aa650f3e
Reduces the CPU overhead of descriptor set updates, which usually happen once per draw call. Gains seem to be minor in most games, some outliers show significantly better performance (i.e. Tomb Raider).
330 lines
14 KiB
C++
330 lines
14 KiB
C++
#include <cstring>
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#include "dxvk_device.h"
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#include "dxvk_graphics.h"
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namespace dxvk {
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DxvkGraphicsPipelineStateInfo::DxvkGraphicsPipelineStateInfo() {
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std::memset(this, 0, sizeof(DxvkGraphicsPipelineStateInfo));
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}
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DxvkGraphicsPipelineStateInfo::DxvkGraphicsPipelineStateInfo(
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const DxvkGraphicsPipelineStateInfo& other) {
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std::memcpy(this, &other, sizeof(DxvkGraphicsPipelineStateInfo));
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}
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DxvkGraphicsPipelineStateInfo& DxvkGraphicsPipelineStateInfo::operator = (
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const DxvkGraphicsPipelineStateInfo& other) {
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std::memcpy(this, &other, sizeof(DxvkGraphicsPipelineStateInfo));
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return *this;
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}
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bool DxvkGraphicsPipelineStateInfo::operator == (const DxvkGraphicsPipelineStateInfo& other) const {
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return std::memcmp(this, &other, sizeof(DxvkGraphicsPipelineStateInfo)) == 0;
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}
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bool DxvkGraphicsPipelineStateInfo::operator != (const DxvkGraphicsPipelineStateInfo& other) const {
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return std::memcmp(this, &other, sizeof(DxvkGraphicsPipelineStateInfo)) != 0;
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}
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DxvkGraphicsPipeline::DxvkGraphicsPipeline(
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const DxvkDevice* device,
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const Rc<DxvkPipelineCache>& cache,
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const Rc<DxvkShader>& vs,
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const Rc<DxvkShader>& tcs,
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const Rc<DxvkShader>& tes,
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const Rc<DxvkShader>& gs,
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const Rc<DxvkShader>& fs)
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: m_device(device), m_vkd(device->vkd()),
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m_cache(cache) {
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DxvkDescriptorSlotMapping slotMapping;
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if (vs != nullptr) vs ->defineResourceSlots(slotMapping);
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if (tcs != nullptr) tcs->defineResourceSlots(slotMapping);
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if (tes != nullptr) tes->defineResourceSlots(slotMapping);
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if (gs != nullptr) gs ->defineResourceSlots(slotMapping);
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if (fs != nullptr) fs ->defineResourceSlots(slotMapping);
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m_layout = new DxvkPipelineLayout(m_vkd,
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slotMapping.bindingCount(),
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slotMapping.bindingInfos(),
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VK_PIPELINE_BIND_POINT_GRAPHICS);
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if (vs != nullptr) m_vs = vs ->createShaderModule(m_vkd, slotMapping);
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if (tcs != nullptr) m_tcs = tcs->createShaderModule(m_vkd, slotMapping);
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if (tes != nullptr) m_tes = tes->createShaderModule(m_vkd, slotMapping);
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if (gs != nullptr) m_gs = gs ->createShaderModule(m_vkd, slotMapping);
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if (fs != nullptr) m_fs = fs ->createShaderModule(m_vkd, slotMapping);
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m_vsIn = vs != nullptr ? vs->interfaceSlots().inputSlots : 0;
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m_fsOut = fs != nullptr ? fs->interfaceSlots().outputSlots : 0;
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}
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DxvkGraphicsPipeline::~DxvkGraphicsPipeline() {
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this->destroyPipelines();
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}
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VkPipeline DxvkGraphicsPipeline::getPipelineHandle(
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const DxvkGraphicsPipelineStateInfo& state) {
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std::lock_guard<std::mutex> lock(m_mutex);
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for (const PipelineStruct& pair : m_pipelines) {
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if (pair.stateVector == state)
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return pair.pipeline;
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}
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VkPipeline pipeline = this->validatePipelineState(state)
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? this->compilePipeline(state, m_basePipeline)
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: VK_NULL_HANDLE;
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m_pipelines.push_back({ state, pipeline });
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if (m_basePipeline == VK_NULL_HANDLE)
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m_basePipeline = pipeline;
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return pipeline;
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}
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VkPipeline DxvkGraphicsPipeline::compilePipeline(
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const DxvkGraphicsPipelineStateInfo& state,
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VkPipeline baseHandle) const {
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if (Logger::logLevel() <= LogLevel::Debug)
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this->logPipelineState(state);
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std::array<VkDynamicState, 4> dynamicStates = {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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VK_DYNAMIC_STATE_BLEND_CONSTANTS,
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VK_DYNAMIC_STATE_STENCIL_REFERENCE,
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};
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std::array<VkBool32, MaxNumActiveBindings> specData;
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std::array<VkSpecializationMapEntry, MaxNumActiveBindings> specMap;
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for (uint32_t i = 0; i < MaxNumActiveBindings; i++) {
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specData[i] = state.bsBindingState.isBound(i) ? VK_TRUE : VK_FALSE;
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specMap [i] = { i, static_cast<uint32_t>(sizeof(VkBool32)) * i, sizeof(VkBool32) };
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}
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VkSpecializationInfo specInfo;
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specInfo.mapEntryCount = specMap.size();
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specInfo.pMapEntries = specMap.data();
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specInfo.dataSize = specData.size() * sizeof(VkBool32);
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specInfo.pData = specData.data();
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std::vector<VkPipelineShaderStageCreateInfo> stages;
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if (m_vs != nullptr) stages.push_back(m_vs->stageInfo(&specInfo));
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if (m_tcs != nullptr) stages.push_back(m_tcs->stageInfo(&specInfo));
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if (m_tes != nullptr) stages.push_back(m_tes->stageInfo(&specInfo));
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if (m_gs != nullptr) stages.push_back(m_gs->stageInfo(&specInfo));
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if (m_fs != nullptr) stages.push_back(m_fs->stageInfo(&specInfo));
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VkPipelineVertexInputStateCreateInfo viInfo;
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viInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO;
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viInfo.pNext = nullptr;
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viInfo.flags = 0;
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viInfo.vertexBindingDescriptionCount = state.ilBindingCount;
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viInfo.pVertexBindingDescriptions = state.ilBindings;
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viInfo.vertexAttributeDescriptionCount = state.ilAttributeCount;
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viInfo.pVertexAttributeDescriptions = state.ilAttributes;
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VkPipelineInputAssemblyStateCreateInfo iaInfo;
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iaInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
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iaInfo.pNext = nullptr;
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iaInfo.flags = 0;
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iaInfo.topology = state.iaPrimitiveTopology;
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iaInfo.primitiveRestartEnable = state.iaPrimitiveRestart;
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VkPipelineTessellationStateCreateInfo tsInfo;
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tsInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO;
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tsInfo.pNext = nullptr;
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tsInfo.flags = 0;
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tsInfo.patchControlPoints = state.iaPatchVertexCount;
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VkPipelineViewportStateCreateInfo vpInfo;
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vpInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO;
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vpInfo.pNext = nullptr;
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vpInfo.flags = 0;
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vpInfo.viewportCount = state.rsViewportCount;
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vpInfo.pViewports = nullptr;
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vpInfo.scissorCount = state.rsViewportCount;
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vpInfo.pScissors = nullptr;
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VkPipelineRasterizationStateRasterizationOrderAMD rsOrder;
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rsOrder.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_RASTERIZATION_ORDER_AMD;
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rsOrder.pNext = nullptr;
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rsOrder.rasterizationOrder = this->pickRasterizationOrder(state);
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VkPipelineRasterizationStateCreateInfo rsInfo;
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rsInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;
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rsInfo.pNext = m_device->extensions().amdRasterizationOrder.enabled() ? &rsOrder : rsOrder.pNext;
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rsInfo.flags = 0;
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rsInfo.depthClampEnable = state.rsEnableDepthClamp;
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rsInfo.rasterizerDiscardEnable= state.rsEnableDiscard;
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rsInfo.polygonMode = state.rsPolygonMode;
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rsInfo.cullMode = state.rsCullMode;
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rsInfo.frontFace = state.rsFrontFace;
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rsInfo.depthBiasEnable = state.rsDepthBiasEnable;
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rsInfo.depthBiasConstantFactor= state.rsDepthBiasConstant;
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rsInfo.depthBiasClamp = state.rsDepthBiasClamp;
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rsInfo.depthBiasSlopeFactor = state.rsDepthBiasSlope;
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rsInfo.lineWidth = 1.0f;
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VkPipelineMultisampleStateCreateInfo msInfo;
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msInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO;
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msInfo.pNext = nullptr;
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msInfo.flags = 0;
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msInfo.rasterizationSamples = state.msSampleCount;
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msInfo.sampleShadingEnable = state.msEnableSampleShading;
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msInfo.minSampleShading = state.msMinSampleShading;
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msInfo.pSampleMask = &state.msSampleMask;
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msInfo.alphaToCoverageEnable = state.msEnableAlphaToCoverage;
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msInfo.alphaToOneEnable = state.msEnableAlphaToOne;
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VkPipelineDepthStencilStateCreateInfo dsInfo;
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dsInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO;
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dsInfo.pNext = nullptr;
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dsInfo.flags = 0;
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dsInfo.depthTestEnable = state.dsEnableDepthTest;
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dsInfo.depthWriteEnable = state.dsEnableDepthWrite;
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dsInfo.depthCompareOp = state.dsDepthCompareOp;
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dsInfo.depthBoundsTestEnable = state.dsEnableDepthBounds;
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dsInfo.stencilTestEnable = state.dsEnableStencilTest;
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dsInfo.front = state.dsStencilOpFront;
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dsInfo.back = state.dsStencilOpBack;
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dsInfo.minDepthBounds = state.dsDepthBoundsMin;
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dsInfo.maxDepthBounds = state.dsDepthBoundsMax;
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VkPipelineColorBlendStateCreateInfo cbInfo;
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cbInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO;
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cbInfo.pNext = nullptr;
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cbInfo.flags = 0;
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cbInfo.logicOpEnable = state.omEnableLogicOp;
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cbInfo.logicOp = state.omLogicOp;
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cbInfo.attachmentCount = DxvkLimits::MaxNumRenderTargets;
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cbInfo.pAttachments = state.omBlendAttachments;
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for (uint32_t i = 0; i < 4; i++)
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cbInfo.blendConstants[i] = 0.0f;
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VkPipelineDynamicStateCreateInfo dyInfo;
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dyInfo.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO;
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dyInfo.pNext = nullptr;
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dyInfo.flags = 0;
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dyInfo.dynamicStateCount = dynamicStates.size();
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dyInfo.pDynamicStates = dynamicStates.data();
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VkGraphicsPipelineCreateInfo info;
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info.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO;
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info.pNext = nullptr;
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info.flags = baseHandle == VK_NULL_HANDLE
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? VK_PIPELINE_CREATE_ALLOW_DERIVATIVES_BIT
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: VK_PIPELINE_CREATE_DERIVATIVE_BIT;
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info.stageCount = stages.size();
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info.pStages = stages.data();
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info.pVertexInputState = &viInfo;
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info.pInputAssemblyState = &iaInfo;
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info.pTessellationState = &tsInfo;
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info.pViewportState = &vpInfo;
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info.pRasterizationState = &rsInfo;
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info.pMultisampleState = &msInfo;
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info.pDepthStencilState = &dsInfo;
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info.pColorBlendState = &cbInfo;
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info.pDynamicState = &dyInfo;
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info.layout = m_layout->pipelineLayout();
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info.renderPass = state.omRenderPass;
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info.subpass = 0;
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info.basePipelineHandle = baseHandle;
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info.basePipelineIndex = -1;
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if (tsInfo.patchControlPoints == 0)
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info.pTessellationState = nullptr;
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if ((tsInfo.patchControlPoints != 0) && (m_tcs == nullptr || m_tes == nullptr)) {
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Logger::err("DxvkGraphicsPipeline: Cannot use tessellation patches without tessellation shaders");
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return VK_NULL_HANDLE;
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}
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VkPipeline pipeline = VK_NULL_HANDLE;
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if (m_vkd->vkCreateGraphicsPipelines(m_vkd->device(),
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m_cache->handle(), 1, &info, nullptr, &pipeline) != VK_SUCCESS) {
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Logger::err("DxvkGraphicsPipeline: Failed to compile pipeline");
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return VK_NULL_HANDLE;
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}
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return pipeline;
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}
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void DxvkGraphicsPipeline::destroyPipelines() {
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for (const PipelineStruct& pair : m_pipelines)
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m_vkd->vkDestroyPipeline(m_vkd->device(), pair.pipeline, nullptr);
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}
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bool DxvkGraphicsPipeline::validatePipelineState(
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const DxvkGraphicsPipelineStateInfo& state) const {
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// Validate vertex input - each input slot consumed by the
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// vertex shader must be provided by the input layout.
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uint32_t providedVertexInputs = 0;
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for (uint32_t i = 0; i < state.ilAttributeCount; i++)
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providedVertexInputs |= 1u << state.ilAttributes[i].location;
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if ((providedVertexInputs & m_vsIn) != m_vsIn) {
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Logger::err("DxvkGraphicsPipeline: Input layout mismatches vertex shader input");
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return false;
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}
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// No errors
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return true;
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}
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VkRasterizationOrderAMD DxvkGraphicsPipeline::pickRasterizationOrder(
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const DxvkGraphicsPipelineStateInfo& state) const {
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// If blending is not enabled, we can enable out-of-order
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// rasterization for certain depth-compare modes.
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bool blendingEnabled = false;
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for (uint32_t i = 0; i < MaxNumRenderTargets; i++) {
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if (m_fsOut & (1u << i))
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blendingEnabled |= state.omBlendAttachments[i].blendEnable;
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}
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if (!blendingEnabled) {
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if (m_device->hasOption(DxvkOption::AssumeNoZfight))
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return VK_RASTERIZATION_ORDER_RELAXED_AMD;
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if (state.dsEnableDepthTest && state.dsEnableDepthWrite
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&& (state.dsDepthCompareOp == VK_COMPARE_OP_LESS
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|| state.dsDepthCompareOp == VK_COMPARE_OP_GREATER))
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return VK_RASTERIZATION_ORDER_RELAXED_AMD;
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}
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return VK_RASTERIZATION_ORDER_STRICT_AMD;
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}
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void DxvkGraphicsPipeline::logPipelineState(
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const DxvkGraphicsPipelineStateInfo& state) const {
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Logger::debug("Compiling graphics pipeline...");
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if (m_vs != nullptr) Logger::debug(str::format(" vs : ", m_vs ->debugName()));
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if (m_tcs != nullptr) Logger::debug(str::format(" tcs : ", m_tcs->debugName()));
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if (m_tes != nullptr) Logger::debug(str::format(" tes : ", m_tes->debugName()));
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if (m_gs != nullptr) Logger::debug(str::format(" gs : ", m_gs ->debugName()));
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if (m_fs != nullptr) Logger::debug(str::format(" fs : ", m_fs ->debugName()));
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// TODO log more pipeline state
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}
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} |