diff --git a/Disasm201/.gitattributes b/Disasm201/.gitattributes new file mode 100644 index 0000000..b110a24 --- /dev/null +++ b/Disasm201/.gitattributes @@ -0,0 +1 @@ +*.{dll,exe} filter=lfs diff=lfs merge=lfs -text \ No newline at end of file diff --git a/Disasm201/Disasm.bpr b/Disasm201/Disasm.bpr new file mode 100644 index 0000000..cd635cd --- /dev/null +++ b/Disasm201/Disasm.bpr @@ -0,0 +1,97 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +[Version Info] +IncludeVerInfo=0 +AutoIncBuild=0 +MajorVer=1 +MinorVer=0 +Release=0 +Build=0 +Debug=0 +PreRelease=0 +Special=0 +Private=0 +DLL=0 +Locale=1033 +CodePage=1252 + +[Version Info Keys] +CompanyName= +FileDescription= +FileVersion=1.0.0.0 +InternalName= +LegalCopyright= +LegalTrademarks= +OriginalFilename= +ProductName= +ProductVersion=1.0.0.0 +Comments= + +[HistoryLists\hlIncludePath] +Count=1 +Item0=$(BCB)\include;$(BCB)\include\vcl + +[HistoryLists\hlDebugSourcePath] +Count=1 +Item0=$(BCB)\source\vcl + +[HistoryLists\hlConditionals] +Count=1 +Item0=_DEBUG + +[Debugging] +DebugSourceDirs=$(BCB)\source\vcl + +[Parameters] +RunParams= +HostApplication= +RemoteHost= +RemotePath= +RemoteDebug=0 + +[Compiler] +ShowInfoMsgs=0 +LinkDebugVcl=0 +LinkCGLIB=0 + + \ No newline at end of file diff --git a/Disasm201/Disasm.c b/Disasm201/Disasm.c new file mode 100644 index 0000000..3c6c961 --- /dev/null +++ b/Disasm201/Disasm.c @@ -0,0 +1,2900 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// OllyDbg Disassembling Engine v2.01 // +// // +// Copyright (c) 2007-2013 Oleh Yuschuk, ollydbg@t-online.de // +// // +// This code is part of the OllyDbg Disassembler v2.01 // +// // +// Disassembling engine is free software; you can redistribute it and/or // +// modify it under the terms of the GNU General Public License as published // +// by the Free Software Foundation; either version 3 of the License, or (at // +// your option) any later version. // +// // +// This code is distributed in the hope that it will be useful, but WITHOUT // +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or // +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for // +// more details. // +// // +// You should have received a copy of the GNU General Public License along // +// with this program. If not, see . // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +// // +// This is a fast disassembler that can be used to determine the length of // +// the binary 80x86 32-bit command and its attributes, to convert it to the // +// human-readable text form, highlight its operands, and create hexadecimal // +// dump of the binary command. // +// // +// It is a stripped down version of the disassembler used by OllyDbg 2.01. // +// It can't analyse and comment the contents of the operands, or predict the // +// results of the command execution. Analysis-dependent features are not // +// included, too. Most other features are kept. // +// // +// Disassembler supports integer, FPU, MMX, 3DNow, SSE1-SSE4.1 and AVX // +// instructions. 64-bit mode, AVX2, FMA and XOP are not (yet) supported. // +// // +// This code can be compiled either in ASCII or UNICODE mode. It is reentrant // +// (thread-safe, feature not available in the original OllyDbg code). // +// // +// Typical operation speed on 3-GHz Phenom II in MASM mode is: // +// // +// Command length and info: 130 ns/command (7,700,000 commands/s) // +// Disassembly: 290 ns/command (3,400,000 commands/s) // +// Disassembly, dump, highlighting: 350 ns/command (2,800,000 commands/s) // +// // +//////////////////////////////////////////////////////////////////////////////// + + +#include +#include +#include +#include +#include +#pragma hdrstop + +#include "disasm.h" + + +//////////////////////////////////////////////////////////////////////////////// +//////////////////////////////// SYMBOLIC NAMES //////////////////////////////// + +// 8-bit register names, sorted by 'natural' index (as understood by CPU, not +// in the alphabetical order as some 'programmers' prefer). +const tchar *regname8[NREG] = { + T("AL"), T("CL"), T("DL"), T("BL"), + T("AH"), T("CH"), T("DH"), T("BH") }; + +// 16-bit register names. +const tchar *regname16[NREG] = { + T("AX"), T("CX"), T("DX"), T("BX"), + T("SP"), T("BP"), T("SI"), T("DI") }; + +// 32-bit register names. +const tchar *regname32[NREG] = { + T("EAX"), T("ECX"), T("EDX"), T("EBX"), + T("ESP"), T("EBP"), T("ESI"), T("EDI") }; + +// Names of segment registers. +const tchar *segname[NREG] = { + T("ES"), T("CS"), T("SS"), T("DS"), + T("FS"), T("GS"), T("SEG6:"), T("SEG7:") }; + +// Names of FPU registers, classical form. +const tchar *fpulong[NREG] = { + T("ST(0)"), T("ST(1)"), T("ST(2)"), T("ST(3)"), + T("ST(4)"), T("ST(5)"), T("ST(6)"), T("ST(7)") }; + +// Names of FPU registers, short form. +const tchar *fpushort[NREG] = { + T("ST0"), T("ST1"), T("ST2"), T("ST3"), + T("ST4"), T("ST5"), T("ST6"), T("ST7") }; + +// Names of MMX/3DNow! registers. +const tchar *mmxname[NREG] = { + T("MM0"), T("MM1"), T("MM2"), T("MM3"), + T("MM4"), T("MM5"), T("MM6"), T("MM7") }; + +// Names of 128-bit SSE registers. +const tchar *sse128[NREG] = { + T("XMM0"), T("XMM1"), T("XMM2"), T("XMM3"), + T("XMM4"), T("XMM5"), T("XMM6"), T("XMM7") }; + +// Names of 256-bit SSE registers. +const tchar *sse256[NREG] = { + T("YMM0"), T("YMM1"), T("YMM2"), T("YMM3"), + T("YMM4"), T("YMM5"), T("YMM6"), T("YMM7") }; + +// Names of control registers. +const tchar *crname[NREG] = { + T("CR0"), T("CR1"), T("CR2"), T("CR3"), + T("CR4"), T("CR5"), T("CR6"), T("CR7") }; + +// Names of debug registers. +const tchar *drname[NREG] = { + T("DR0"), T("DR1"), T("DR2"), T("DR3"), + T("DR4"), T("DR5"), T("DR6"), T("DR7") }; + +// Declarations for data types. Depending on ssesizemode, name of 16-byte data +// type (DQWORD) may be changed to XMMWORD and that of 32-bit type (QQWORD) to +// YMMWORD. +const tchar *sizename[33] = { + NULL, T("BYTE"), T("WORD"), NULL, + T("DWORD"), NULL, T("FWORD"), NULL, + T("QWORD"), NULL, T("TBYTE"), NULL, + NULL, NULL, NULL, NULL, + T("DQWORD"), NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + T("QQWORD") }; + +// Keywords for immediate data. HLA uses sizename[] instead of sizekey[]. +const tchar *sizekey[33] = { + NULL, T("DB"), T("DW"), NULL, + T("DD"), NULL, T("DF"), NULL, + T("DQ"), NULL, T("DT"), NULL, + NULL, NULL, NULL, NULL, + T("DDQ"), NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + T("DQQ") }; + +// Keywords for immediate data in AT&T format. +const tchar *sizeatt[33] = { + NULL, T(".BYTE"), T(".WORD"), NULL, + T(".LONG"), NULL, T(".FWORD"), NULL, + T(".QUAD"), NULL, T(".TBYTE"), NULL, + NULL, NULL, NULL, NULL, + T(".DQUAD"), NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + T(".QQUAD") }; + +// Comparison predicates in SSE [0..7] and VEX commands [0..31]. +const tchar *ssepredicate[32] = { + T("EQ"), T("LT"), T("LE"), T("UNORD"), + T("NEQ"), T("NLT"), T("NLE"), T("ORD"), + T("EQ_UQ"), T("NGE"), T("NGT"), T("FALSE"), + T("NEQ_OQ"), T("GE"), T("GT"), T("TRUE"), + T("EQ_OS"), T("LT_OQ"), T("LE_OQ"), T("UNORD_S"), + T("NEQ_US"), T("NLT_UQ"), T("NLE_UQ"), T("ORD_S"), + T("EQ_US"), T("NGE_UQ"), T("NGT_UQ"), T("FALSE_OS"), + T("NEQ_OS"), T("GE_OQ"), T("GT_OQ"), T("TRUE_US") }; + + +//////////////////////////////////////////////////////////////////////////////// +///////////////////////////////// DISASSEMBLER ///////////////////////////////// + +typedef struct t_imdata { // Intermediate disassembler data + t_disasm *da; // Result of disassembly + ulong damode; // Disassembling mode, set of DA_xxx + t_config *config; // Disassembler configuration + int (*decodeaddress)(tchar *s,ulong addr); + ulong prefixlist; // List of command's prefixes, PF_xxx + int ssesize; // Size of SSE operands (16/32 bytes) + ulong immsize1; // Size of first immediate constant + ulong immsize2; // Size of second immediate constant + ulong mainsize; // Size of command with prefixes + ulong modsize; // Size of ModRegRM/SIB bytes + ulong dispsize; // Size of address offset + int usesdatasize; // May have data size prefix + int usesaddrsize; // May have address size prefix + int usessegment; // May have segment override prefix +} t_imdata; + +static t_config defconfig = { // Default disassembler configuration + DAMODE_MASM, // Main style, one of DAMODE_xxx + NUM_STD|NUM_DECIMAL, // Constant part of address, NUM_xxx + NUM_STD|NUM_LONG, // Jump/call destination, NUM_xxx + NUM_STD|NUM_LONG, // Binary constants, NUM_xxx + NUM_STD|NUM_DECIMAL, // Numeric constants, NUM_xxx + 0, // Force lowercase display + 0, // Tab between mnemonic and arguments + 0, // Extra space between arguments + 0, // Use RET instead of RETN + 1, // Use short form of string commands + 0, // Display default segments in listing + 1, // Always show memory size + 0, // Show NEAR modifiers + 1, // How to decode size of SSE operands + 0, // How to decode jump hints + 0, // How to decode size-sensitive mnemonics + 0, // How to decode top of FPU stack + 0 // Highlight operands +}; + +static t_config attconfig = { // AT&T disassembler configuration + DAMODE_ATT, // Main style, one of DAMODE_xxx + NUM_X|NUM_DECIMAL, // Constant part of address, NUM_xxx + NUM_X|NUM_LONG, // Jump/call destination, NUM_xxx + NUM_X|NUM_LONG, // Binary constants, NUM_xxx + NUM_X|NUM_DECIMAL, // Numeric constants, NUM_xxx + 1, // Force lowercase display + 1, // Tab between mnemonic and arguments + 1, // Extra space between arguments + 0, // Use RET instead of RETN + 1, // Use short form of string commands + 0, // Display default segments in listing + 0, // Always show memory size + 0, // Show NEAR modifiers + 1, // How to decode size of SSE operands + 0, // How to decode jump hints + 0, // How to decode size-sensitive mnemonics + 0, // How to decode top of FPU stack + 0 // Highlight operands +}; + +//////////////////////////////////////////////////////////////////////////////// +////////////////////////////// SERVICE FUNCTIONS /////////////////////////////// + +static tchar hexcharu[16] = { // Nibble-to-hexdigit table, uppercase + T('0'), T('1'), T('2'), T('3'), T('4'), T('5'), T('6'), T('7'), + T('8'), T('9'), T('A'), T('B'), T('C'), T('D'), T('E'), T('F') }; + +static tchar hexcharl[16] = { // Nibble-to-hexdigit table, lowercase + T('0'), T('1'), T('2'), T('3'), T('4'), T('5'), T('6'), T('7'), + T('8'), T('9'), T('a'), T('b'), T('c'), T('d'), T('e'), T('f') }; + +static tchar cvtlower[256]; + +// Copies at most n-1 wide characters from src to dest and assures that dest is +// null-terminated. Slow but reliable. Returns number of copied characters, not +// including the terminal null. Attention, does not check that input parameters +// are correct! +static int Tstrcopy(tchar *dest,int n,const tchar *src) { + int i; + if (n<=0) + return 0; + for (i=0; i0) { + d=*code++; + s[n++]=hexchar[(d>>4) & 0x0F]; + s[n++]=hexchar[d & 0x0F]; + ncode--; + }; + s[n]=T('\0'); + return n; +}; + +// Converts unsigned 1-, 2- or 4-byte number to hexadecimal text, according to +// the specified mode and type of argument. String s must be at least SHORTNAME +// characters long. Returns length of resulting text in characters, not +// including the terminal zero. +static int Hexprint(int size,tchar *s,ulong u,const t_imdata *im,ulong arg) { + int i,k,ndigit,lastdigit; + ulong nummode,mod; + tchar buf[SHORTNAME]; + static tchar *hexchar; + if (size==1) + u&=0x000000FF; // 8-bit number + else if (size==2) + u&=0x0000FFFF; // 16-bit number + else + size=4; // Correct possible errors + mod=arg & B_MODMASK; + if (mod==B_ADDR) + nummode=im->config->memmode; + else if (mod==B_JMPCALL || mod==B_JMPCALLFAR) + nummode=im->config->jmpmode; + else if (mod==B_BINARY) + nummode=im->config->binconstmode; + else + nummode=im->config->constmode; + hexchar=(im->config->lowercase?hexcharl:hexcharu); + buf[SHORTNAME-1]=T('\0'); + k=SHORTNAME-1; + if ((nummode & NUM_DECIMAL)!=0 && (mod==B_SIGNED || mod==B_UNSIGNED || + (u=10) + buf[--k]=T('.'); // Period marks decimals in OllyDbg + do { + buf[--k]=hexchar[u%10]; + u/=10; + } while (u!=0); } + else { + // Decode as hexadecimal number. + if (nummode & NUM_LONG) // 2, 4 or 8 significant digits + ndigit=size*2; + else + ndigit=1; + if ((nummode & NUM_STYLE)==NUM_STD) + buf[--k]=T('h'); + for (i=0; i>4) & 0x0FFFFFFF; }; + if ((nummode & NUM_STYLE)==NUM_X) { + buf[--k]=T('x'); + buf[--k]=T('0'); } + else if (lastdigit>=10 && + ((nummode & NUM_STYLE)!=NUM_OLLY || i<(mod==B_BINARY?size*2:8))) + buf[--k]=T('0'); + ; + }; + return Tstrcopy(s,SHORTNAME,buf+k); +}; + + +//////////////////////////////////////////////////////////////////////////////// +///////////////////////// INTERNAL DISASSEMBLER TABLES ///////////////////////// + +t_chain *cmdchain; // Commands sorted by first CMDMASK bits +t_modrm modrm16[256]; // 16-bit ModRM decodings +t_modrm modrm32[256]; // 32-bit ModRM decodings without SIB +t_modrm sib0[256]; // ModRM-SIB decodings with Mod=00 +t_modrm sib1[256]; // ModRM-SIB decodings with Mod=01 +t_modrm sib2[256]; // ModRM-SIB decodings with Mod=10 + +// Initializes disassembler tables. Call this function once during startup. +// Returns 0 on success and -1 if initialization was unsuccessful. In the last +// case, continuation is not possible and program must terminate. +int Preparedisasm(void) { + int n,c,reg,sreg,scale,nchain; + ulong u,code,mask; + const t_bincmd *pcmd; + t_chain *pchain; + t_modrm *pmrm,*psib; + if (cmdchain!=NULL) + return 0; // Already initialized + // Sort command descriptors into command chains by first CMDMASK bits. + cmdchain=(t_chain *)malloc(NCHAIN*sizeof(t_chain)); + if (cmdchain==NULL) // Low memory + return -1; + memset(cmdchain,0,NCHAIN*sizeof(t_chain)); + nchain=CMDMASK+1; // Number of command chains + for (pcmd=bincmd; pcmd->length!=0; pcmd++) { + if ((pcmd->cmdtype & D_CMDTYPE)==D_PSEUDO) + continue; // Pseudocommand, for search models only + code=pcmd->code; + mask=pcmd->mask & CMDMASK; + for (u=0; upcmd!=NULL && pchain->pnext!=NULL) + pchain=pchain->pnext; // Walk chain to the end + if (pchain->pcmd==NULL) + pchain->pcmd=pcmd; + else if (nchain>=NCHAIN) + return -1; // Too many commands + else { + pchain->pnext=cmdchain+nchain; // Prolongate chain + pchain=pchain->pnext; + pchain->pcmd=pcmd; + nchain++; + }; + }; + }; + // Prepare 16-bit ModRM decodings. + memset(modrm16,0,sizeof(modrm16)); + for (c=0x00,pmrm=modrm16; c<=0xFF; c++,pmrm++) { + reg=c & 0x07; + if ((c & 0xC0)==0xC0) { + // Register in ModRM. + pmrm->size=1; + pmrm->features=0; // Register, its type as yet unknown + pmrm->reg=reg; + pmrm->defseg=SEG_UNDEF; + pmrm->basereg=REG_UNDEF; } + else if ((c & 0xC7)==0x06) { + // Special case of immediate address. + pmrm->size=3; + pmrm->dispsize=2; + pmrm->features=OP_MEMORY|OP_OPCONST|OP_ADDR16; + pmrm->reg=REG_UNDEF; + pmrm->defseg=SEG_DS; + pmrm->basereg=REG_UNDEF; } + else { + pmrm->features=OP_MEMORY|OP_INDEXED|OP_ADDR16; + if ((c & 0xC0)==0x40) { + pmrm->dispsize=1; pmrm->features|=OP_OPCONST; } + else if ((c & 0xC0)==0x80) { + pmrm->dispsize=2; pmrm->features|=OP_OPCONST; }; + pmrm->size=pmrm->dispsize+1; + pmrm->reg=REG_UNDEF; + switch (reg) { + case 0: + pmrm->scale[REG_EBX]=1; pmrm->scale[REG_ESI]=1; + pmrm->defseg=SEG_DS; + tstrcpy(pmrm->ardec,T("BX+SI")); + tstrcpy(pmrm->aratt,T("%BX,%SI")); + pmrm->aregs=(1<basereg=REG_ESI; break; + case 1: + pmrm->scale[REG_EBX]=1; pmrm->scale[REG_EDI]=1; + pmrm->defseg=SEG_DS; + tstrcpy(pmrm->ardec,T("BX+DI")); + tstrcpy(pmrm->aratt,T("%BX,%DI")); + pmrm->aregs=(1<basereg=REG_EDI; break; + case 2: + pmrm->scale[REG_EBP]=1; pmrm->scale[REG_ESI]=1; + pmrm->defseg=SEG_SS; + tstrcpy(pmrm->ardec,T("BP+SI")); + tstrcpy(pmrm->aratt,T("%BP,%SI")); + pmrm->aregs=(1<basereg=REG_ESI; break; + case 3: + pmrm->scale[REG_EBP]=1; pmrm->scale[REG_EDI]=1; + pmrm->defseg=SEG_SS; + tstrcpy(pmrm->ardec,T("BP+DI")); + tstrcpy(pmrm->aratt,T("%BP,%DI")); + pmrm->aregs=(1<basereg=REG_EDI; break; + case 4: + pmrm->scale[REG_ESI]=1; + pmrm->defseg=SEG_DS; + tstrcpy(pmrm->ardec,T("SI")); + tstrcpy(pmrm->aratt,T("%SI")); + pmrm->aregs=(1<basereg=REG_ESI; break; + case 5: + pmrm->scale[REG_EDI]=1; + pmrm->defseg=SEG_DS; + tstrcpy(pmrm->ardec,T("DI")); + tstrcpy(pmrm->aratt,T("%DI")); + pmrm->aregs=(1<basereg=REG_EDI; break; + case 6: + pmrm->scale[REG_EBP]=1; + pmrm->defseg=SEG_SS; + tstrcpy(pmrm->ardec,T("BP")); + tstrcpy(pmrm->aratt,T("%BP")); + pmrm->aregs=(1<basereg=REG_EBP; break; + case 7: + pmrm->scale[REG_EBX]=1; + pmrm->defseg=SEG_DS; + tstrcpy(pmrm->ardec,T("BX")); + tstrcpy(pmrm->aratt,T("%BX")); + pmrm->aregs=(1<basereg=REG_EBX; + break; + }; + }; + }; + // Prepare 32-bit ModRM decodings without SIB. + memset(modrm32,0,sizeof(modrm32)); + for (c=0x00,pmrm=modrm32; c<=0xFF; c++,pmrm++) { + reg=c & 0x07; + if ((c & 0xC0)==0xC0) { + // Register in ModRM. + pmrm->size=1; + pmrm->features=0; // Register, its type as yet unknown + pmrm->reg=reg; + pmrm->defseg=SEG_UNDEF; + pmrm->basereg=REG_UNDEF; } + else if ((c & 0xC7)==0x05) { + // Special case of 32-bit immediate address. + pmrm->size=5; + pmrm->dispsize=4; + pmrm->features=OP_MEMORY|OP_OPCONST; + pmrm->reg=REG_UNDEF; + pmrm->defseg=SEG_DS; + pmrm->basereg=REG_UNDEF; } + else { + // Regular memory address. + pmrm->features=OP_MEMORY; + pmrm->reg=REG_UNDEF; + if ((c & 0xC0)==0x40) { + pmrm->dispsize=1; // 8-bit sign-extended displacement + pmrm->features|=OP_OPCONST; } + else if ((c & 0xC0)==0x80) { + pmrm->dispsize=4; // 32-bit displacement + pmrm->features|=OP_OPCONST; }; + if (reg==REG_ESP) { + // SIB byte follows, decode with sib32. + if ((c & 0xC0)==0x00) pmrm->psib=sib0; + else if ((c & 0xC0)==0x40) pmrm->psib=sib1; + else pmrm->psib=sib2; + pmrm->basereg=REG_UNDEF; } + else { + pmrm->size=1+pmrm->dispsize; + pmrm->features|=OP_INDEXED; + pmrm->defseg=(reg==REG_EBP?SEG_SS:SEG_DS); + pmrm->scale[reg]=1; + tstrcpy(pmrm->ardec,regname32[reg]); + pmrm->aratt[0]=T('%'); + Tstrcopy(pmrm->aratt+1,SHORTNAME-1,regname32[reg]); + pmrm->aregs=(1<basereg=reg; + }; + }; + }; + // Prepare 32-bit ModRM decodings with SIB, case Mod=00: usually no disp. + memset(sib0,0,sizeof(sib0)); + for (c=0x00,psib=sib0; c<=0xFF; c++,psib++) { + psib->features=OP_MEMORY; + psib->reg=REG_UNDEF; + reg=c & 0x07; + sreg=(c>>3) & 0x07; + if ((c & 0xC0)==0) scale=1; + else if ((c & 0xC0)==0x40) scale=2; + else if ((c & 0xC0)==0x80) scale=4; + else scale=8; + if (sreg!=REG_ESP) { + psib->scale[sreg]=(uchar)scale; + n=Tstrcopy(psib->ardec,SHORTNAME,regname32[sreg]); + psib->aregs=(1<features|=OP_INDEXED; + if (scale>1) { + psib->ardec[n++]=T('*'); + psib->ardec[n++]=(tchar)(T('0')+scale); + psib->ardec[n]=T('\0'); + }; } + else + n=0; + if (reg==REG_EBP) { + psib->size=6; + psib->dispsize=4; + psib->features|=OP_OPCONST; + psib->defseg=SEG_DS; + psib->basereg=REG_UNDEF; } + else { + psib->size=2; + psib->defseg=((reg==REG_ESP || reg==REG_EBP)?SEG_SS:SEG_DS); + psib->scale[reg]++; + psib->features|=OP_INDEXED; + if (n!=0) psib->ardec[n++]=T('+'); + Tstrcopy(psib->ardec+n,SHORTNAME-n,regname32[reg]); + psib->aregs|=(1<basereg=reg; }; + if (reg!=REG_EBP) { + psib->aratt[0]=T('%'); n=1; + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[reg]); } + else + n=0; + if (sreg!=REG_ESP) { + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,T(",%")); + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[sreg]); + if (scale>1) { + psib->aratt[n++]=T(','); + psib->aratt[n++]=(tchar)(T('0')+scale); + psib->aratt[n]=T('\0'); + }; + }; + }; + // Prepare 32-bit ModRM decodings with SIB, case Mod=01: 8-bit displacement. + memset(sib1,0,sizeof(sib1)); + for (c=0x00,psib=sib1; c<=0xFF; c++,psib++) { + psib->features=OP_MEMORY|OP_INDEXED|OP_OPCONST; + psib->reg=REG_UNDEF; + reg=c & 0x07; + sreg=(c>>3) & 0x07; + if ((c & 0xC0)==0) scale=1; + else if ((c & 0xC0)==0x40) scale=2; + else if ((c & 0xC0)==0x80) scale=4; + else scale=8; + psib->size=3; + psib->dispsize=1; + psib->defseg=((reg==REG_ESP || reg==REG_EBP)?SEG_SS:SEG_DS); + psib->scale[reg]=1; + psib->basereg=reg; + psib->aregs=(1<scale[sreg]+=(uchar)scale; + n=Tstrcopy(psib->ardec,SHORTNAME,regname32[sreg]); + psib->aregs|=(1<1) { + psib->ardec[n++]=T('*'); + psib->ardec[n++]=(tchar)(T('0')+scale); + }; } + else + n=0; + if (n!=0) psib->ardec[n++]=T('+'); + Tstrcopy(psib->ardec+n,SHORTNAME-n,regname32[reg]); + psib->aratt[0]=T('%'); n=1; + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[reg]); + if (sreg!=REG_ESP) { + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,T(",%")); + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[sreg]); + if (scale>1) { + psib->aratt[n++]=T(','); + psib->aratt[n++]=(tchar)(T('0')+scale); + psib->aratt[n]=T('\0'); + }; + }; + }; + // Prepare 32-bit ModRM decodings with SIB, case Mod=10: 32-bit displacement. + memset(sib2,0,sizeof(sib2)); + for (c=0x00,psib=sib2; c<=0xFF; c++,psib++) { + psib->features=OP_MEMORY|OP_INDEXED|OP_OPCONST; + psib->reg=REG_UNDEF; + reg=c & 0x07; + sreg=(c>>3) & 0x07; + if ((c & 0xC0)==0) scale=1; + else if ((c & 0xC0)==0x40) scale=2; + else if ((c & 0xC0)==0x80) scale=4; + else scale=8; + psib->size=6; + psib->dispsize=4; + psib->defseg=((reg==REG_ESP || reg==REG_EBP)?SEG_SS:SEG_DS); + psib->scale[reg]=1; + psib->basereg=reg; + psib->aregs=(1<scale[sreg]+=(uchar)scale; + n=Tstrcopy(psib->ardec,SHORTNAME,regname32[sreg]); + psib->aregs|=(1<1) { + psib->ardec[n++]=T('*'); + psib->ardec[n++]=(tchar)(T('0')+scale); + }; } + else + n=0; + if (n!=0) psib->ardec[n++]=T('+'); + Tstrcopy(psib->ardec+n,SHORTNAME-n,regname32[reg]); + psib->aratt[0]=T('%'); n=1; + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[reg]); + if (sreg!=REG_ESP) { + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,T(",%")); + n+=Tstrcopy(psib->aratt+n,SHORTNAME-n,regname32[sreg]); + if (scale>1) { + psib->aratt[n++]=T(','); + psib->aratt[n++]=(tchar)(T('0')+scale); + psib->aratt[n]=T('\0'); + }; + }; + }; + // Fill lowercase conversion table. This table replaces tolower(). When + // compiled with Borland C++ Builder, spares significant time. + for (c=0; c<256; c++) + cvtlower[c]=(tchar)ttolower(c); + // Report success. + return 0; +}; + +// Frees resources allocated by Preparedisasm(). Call this function once +// during shutdown after disassembling service is no longer necessary. +void Finishdisasm(void) { + if (cmdchain!=NULL) { + free(cmdchain); + cmdchain=NULL; + }; +}; + + +//////////////////////////////////////////////////////////////////////////////// +////////////////////////////// AUXILIARY ROUTINES ////////////////////////////// + +// Given index of byte register, returns index of 32-bit container. +static int Byteregtodwordreg(int bytereg) { + if (bytereg<0 || bytereg>=NREG) + return REG_UNDEF; + if (bytereg>=4) + return bytereg-4; + return bytereg; +}; + +// Checks prefix override flags and generates warnings if prefix is superfluous. +// Returns index of segment register. Note that Disasm() assures that two +// segment override bits in im->prefixlist can't be set simultaneously. +static int Getsegment(t_imdata *im,int arg,int defseg) { + if ((im->prefixlist & PF_SEGMASK)==0) + return defseg; // Optimization for most frequent case + switch (im->prefixlist & PF_SEGMASK) { + case PF_ES: + if (defseg==SEG_ES) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_ES; + case PF_CS: + if (defseg==SEG_CS) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_CS; + case PF_SS: + if (defseg==SEG_SS) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_SS; + case PF_DS: + if (defseg==SEG_DS) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_DS; + case PF_FS: + if (defseg==SEG_FS) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_FS; + case PF_GS: + if (defseg==SEG_GS) im->da->warnings|=DAW_DEFSEG; + if (arg & B_NOSEG) im->da->warnings|=DAW_SEGPREFIX; + return SEG_GS; + default: return defseg; // Most frequent case of default segment + }; +}; + +// Decodes generalized memory address to text. +static void Memaddrtotext(t_imdata *im,int arg,int datasize,int seg, + const tchar *regpart,long constpart,tchar *s) { + int n; + tchar label[TEXTLEN]; + if (im->config->disasmmode==DAMODE_ATT) { + // AT&T memory address syntax is so different from Intel that I process it + // separately from the rest. + n=0; + if ((arg & B_MODMASK)==B_JMPCALL) + s[n++]=T('*'); + // On request, I show only explicit segments. + if ((im->config->putdefseg && (arg & B_NOSEG)==0) || + (im->prefixlist & PF_SEGMASK)!=0 + ) { + s[n++]=T('%'); + n+=Tcopycase(s+n,TEXTLEN-n,segname[seg],im->config->lowercase); + s[n++]=T(':'); }; + // Add constant part (offset). + if (constpart<0 && constpart>NEGLIMIT) { + s[n++]=T('-'); + n+=Hexprint((im->prefixlist & PF_ASIZE?2:4),s+n,-constpart,im,B_ADDR); } + else if (constpart!=0) { + if (seg!=SEG_FS && seg!=SEG_GS && + im->decodeaddress!=NULL && + im->decodeaddress(label,constpart)!=0) + n+=Tstrcopy(s+n,TEXTLEN-n,label); + else + n+=Hexprint((im->prefixlist & PF_ASIZE?2:4),s+n,constpart,im,B_ADDR); + ; + }; + // Add register part of address, may be absent. + if (regpart[0]!=T('\0')) { + n+=Tstrcopy(s+n,TEXTLEN-n,T("(")); + n+=Tcopycase(s+n,TEXTLEN-n,regpart,im->config->lowercase); + n+=Tstrcopy(s+n,TEXTLEN-n,T(")")); + }; } + else { + // Mark far and near jump/call addresses. + if ((arg & B_MODMASK)==B_JMPCALLFAR) + n=Tcopycase(s,TEXTLEN,T("FAR "),im->config->lowercase); + else if (im->config->shownear && (arg & B_MODMASK)==B_JMPCALL) + n=Tcopycase(s,TEXTLEN,T("NEAR "),im->config->lowercase); + else + n=0; + if (im->config->disasmmode!=DAMODE_MASM) { + s[n++]=T('['); + if ((im->prefixlist & PF_ASIZE)!=0 && regpart[0]==T('\0')) + n+=Tcopycase(s+n,TEXTLEN-n,T("SMALL "),im->config->lowercase); + ; + }; + // If operand is longer than 32 bytes or of type B_ANYMEM (memory contents + // unimportant), its size is not displayed. Otherwise, bit B_SHOWSIZE + // indicates that explicit operand's size can't be omitted. + if (datasize<=32 && (arg & B_ARGMASK)!=B_ANYMEM && + (im->config->showmemsize!=0 || (arg & B_SHOWSIZE)!=0) + ) { + if (im->config->disasmmode==DAMODE_HLA) + n+=Tcopycase(s+n,TEXTLEN-n,T("TYPE "),im->config->lowercase); + if ((arg & B_ARGMASK)==B_INTPAIR && im->config->disasmmode==DAMODE_IDEAL){ + // If operand is a pair of integers (BOUND), Borland in IDEAL mode + // expects size of single integer, whereas MASM requires size of the + // whole pair. + n+=Tcopycase(s+n,TEXTLEN-n,sizename[datasize/2],im->config->lowercase); + s[n++]=T(' '); } + else if (datasize==16 && im->config->ssesizemode==1) + n+=Tcopycase(s+n,TEXTLEN-n,T("XMMWORD "),im->config->lowercase); + else if (datasize==32 && im->config->ssesizemode==1) + n+=Tcopycase(s+n,TEXTLEN-n,T("YMMWORD "),im->config->lowercase); + else { + n+=Tcopycase(s+n,TEXTLEN-n,sizename[datasize],im->config->lowercase); + s[n++]=T(' '); }; + if (im->config->disasmmode==DAMODE_MASM) + n+=Tcopycase(s+n,TEXTLEN-n,T("PTR "),im->config->lowercase); + ; + }; + // On request, I show only explicit segments. + if ((im->config->putdefseg && (arg & B_NOSEG)==0) || + (im->prefixlist & PF_SEGMASK)!=0 + ) { + n+=Tcopycase(s+n,TEXTLEN-n,segname[seg],im->config->lowercase); + s[n++]=T(':'); }; + if (im->config->disasmmode==DAMODE_MASM) { + s[n++]=T('['); + if ((im->prefixlist & PF_ASIZE)!=0 && regpart[0]==T('\0')) + n+=Tcopycase(s+n,TEXTLEN-n,T("SMALL "),im->config->lowercase); + ; + }; + // Add register part of address, may be absent. + if (regpart[0]!=T('\0')) + n+=Tcopycase(s+n,TEXTLEN-n,regpart,im->config->lowercase); + if (regpart[0]!=T('\0') && constpart<0 && constpart>NEGLIMIT) { + s[n++]=T('-'); + n+=Hexprint((im->prefixlist & PF_ASIZE?2:4),s+n,-constpart,im,B_ADDR); } + else if (constpart!=0 || regpart[0]==T('\0')) { + if (regpart[0]!=T('\0')) s[n++]=T('+'); + if (seg!=SEG_FS && seg!=SEG_GS && + im->decodeaddress!=NULL && + im->decodeaddress(label,constpart)!=0) + n+=Tstrcopy(s+n,TEXTLEN-n,label); + else + n+=Hexprint((im->prefixlist & PF_ASIZE?2:4),s+n,constpart,im,B_ADDR); + ; + }; + n+=Tstrcopy(s+n,TEXTLEN-n,T("]")); + }; + s[n]=T('\0'); +}; + +// Service function, returns granularity of MMX, 3DNow! and SSE operands. +static int Getgranularity(ulong arg) { + int granularity; + switch (arg & B_ARGMASK) { + case B_MREG8x8: // MMX register as 8 8-bit integers + case B_MMX8x8: // MMX reg/memory as 8 8-bit integers + case B_MMX8x8DI: // MMX 8 8-bit integers at [DS:(E)DI] + case B_XMM0I8x16: // XMM0 as 16 8-bit integers + case B_SREGI8x16: // SSE register as 16 8-bit sigints + case B_SVEXI8x16: // SSE reg in VEX as 16 8-bit sigints + case B_SIMMI8x16: // SSE reg in immediate 8-bit constant + case B_SSEI8x16: // SSE reg/memory as 16 8-bit sigints + case B_SSEI8x16DI: // SSE 16 8-bit sigints at [DS:(E)DI] + case B_SSEI8x8L: // Low 8 8-bit ints in SSE reg/memory + case B_SSEI8x4L: // Low 4 8-bit ints in SSE reg/memory + case B_SSEI8x2L: // Low 2 8-bit ints in SSE reg/memory + granularity=1; break; + case B_MREG16x4: // MMX register as 4 16-bit integers + case B_MMX16x4: // MMX reg/memory as 4 16-bit integers + case B_SREGI16x8: // SSE register as 8 16-bit sigints + case B_SVEXI16x8: // SSE reg in VEX as 8 16-bit sigints + case B_SSEI16x8: // SSE reg/memory as 8 16-bit sigints + case B_SSEI16x4L: // Low 4 16-bit ints in SSE reg/memory + case B_SSEI16x2L: // Low 2 16-bit ints in SSE reg/memory + granularity=2; break; + case B_MREG32x2: // MMX register as 2 32-bit integers + case B_MMX32x2: // MMX reg/memory as 2 32-bit integers + case B_3DREG: // 3DNow! register as 2 32-bit floats + case B_3DNOW: // 3DNow! reg/memory as 2 32-bit floats + case B_SREGF32x4: // SSE register as 4 32-bit floats + case B_SVEXF32x4: // SSE reg in VEX as 4 32-bit floats + case B_SREGF32L: // Low 32-bit float in SSE register + case B_SVEXF32L: // Low 32-bit float in SSE in VEX + case B_SREGF32x2L: // Low 2 32-bit floats in SSE register + case B_SSEF32x4: // SSE reg/memory as 4 32-bit floats + case B_SSEF32L: // Low 32-bit float in SSE reg/memory + case B_SSEF32x2L: // Low 2 32-bit floats in SSE reg/memory + granularity=4; break; + case B_XMM0I32x4: // XMM0 as 4 32-bit integers + case B_SREGI32x4: // SSE register as 4 32-bit sigints + case B_SVEXI32x4: // SSE reg in VEX as 4 32-bit sigints + case B_SREGI32L: // Low 32-bit sigint in SSE register + case B_SREGI32x2L: // Low 2 32-bit sigints in SSE register + case B_SSEI32x4: // SSE reg/memory as 4 32-bit sigints + case B_SSEI32x2L: // Low 2 32-bit sigints in SSE reg/memory + granularity=4; break; + case B_MREG64: // MMX register as 1 64-bit integer + case B_MMX64: // MMX reg/memory as 1 64-bit integer + case B_XMM0I64x2: // XMM0 as 2 64-bit integers + case B_SREGF64x2: // SSE register as 2 64-bit floats + case B_SVEXF64x2: // SSE reg in VEX as 2 64-bit floats + case B_SREGF64L: // Low 64-bit float in SSE register + case B_SVEXF64L: // Low 64-bit float in SSE in VEX + case B_SSEF64x2: // SSE reg/memory as 2 64-bit floats + case B_SSEF64L: // Low 64-bit float in SSE reg/memory + granularity=8; break; + case B_SREGI64x2: // SSE register as 2 64-bit sigints + case B_SVEXI64x2: // SSE reg in VEX as 2 64-bit sigints + case B_SSEI64x2: // SSE reg/memory as 2 64-bit sigints + case B_SREGI64L: // Low 64-bit sigint in SSE register + granularity=8; break; + default: + granularity=1; // Treat unknown ops as string of bytes + break; }; + return granularity; +}; + + +//////////////////////////////////////////////////////////////////////////////// +////////////////////////// OPERAND DECODING ROUTINES /////////////////////////// + +// Decodes 8/16/32-bit integer register operand. ATTENTION, calling routine +// must set usesdatasize and usesaddrsize by itself! +static void Operandintreg(t_imdata *im,ulong datasize,int index,t_operand *op) { + int n,reg32; + op->features=OP_REGISTER; + op->opsize=op->granularity=datasize; + op->reg=index; + op->seg=SEG_UNDEF; + // Add container register to lists of used and modified registers. + if (datasize==1) + reg32=Byteregtodwordreg(index); + else + reg32=index; + if ((op->arg & B_CHG)==0) { + op->uses=(1<da->uses|=(1<arg & (B_CHG|B_UPD)) { + op->modifies=(1<da->modifies|=(1<arg & B_NOESP)!=0 && reg32==REG_ESP) + im->da->warnings|=DAW_NOESP; + // Decode name of integer register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) { + if ((op->arg & B_MODMASK)==B_JMPCALL) op->text[n++]=T('*'); + op->text[n++]=T('%'); }; + if (datasize==4) // Most frequent case first + Tcopycase(op->text+n,TEXTLEN-n,regname32[index],im->config->lowercase); + else if (datasize==1) + Tcopycase(op->text+n,TEXTLEN-n,regname8[index],im->config->lowercase); + else // 16-bit registers are seldom + Tcopycase(op->text+n,TEXTLEN-n,regname16[index],im->config->lowercase); + ; + }; +}; + +// Decodes 16/32-bit memory address in ModRM/SIB bytes. Returns full length of +// address (ModRM+SIB+displacement) in bytes, 0 if ModRM indicates register +// operand and -1 on error. ATTENTION, calling routine must set usesdatasize, +// granularity (preset to datasize) and reg together with OP_MODREG by itself! +static int Operandmodrm(t_imdata *im,ulong datasize,uchar *cmd,ulong cmdsize, + t_operand *op) { + tchar *ardec; + t_modrm *pmrm; + if (cmdsize==0) { + im->da->errors|=DAE_CROSS; // Command crosses end of memory block + return -1; }; + // Decode ModRM/SIB. Most of the work is already done in Preparedisasm(), we + // only need to find corresponding t_modrm. + if (im->prefixlist & PF_ASIZE) { + pmrm=modrm16+cmd[0]; // 16-bit address + im->modsize=1; } + else { + pmrm=modrm32+cmd[0]; + if (pmrm->psib==NULL) + im->modsize=1; // No SIB byte + else { + if (cmdsize<2) { + im->da->errors|=DAE_CROSS; // Command crosses end of memory block + return -1; }; + pmrm=pmrm->psib+cmd[1]; + im->modsize=2; // Both ModRM and SIB + }; + }; + // Check whether ModRM indicates register operand and immediately return if + // true. As a side effect, modsize is already set. + if ((cmd[0] & 0xC0)==0xC0) + return 0; + // Operand in memory. + op->opsize=datasize; + op->granularity=datasize; // Default, may be overriden later + op->reg=REG_UNDEF; + im->usesaddrsize=1; // Address size prefix is meaningful + im->usessegment=1; // Segment override prefix is meaningful + // Fetch precalculated t_modrm fields. + op->features=pmrm->features; + memcpy(op->scale,pmrm->scale,8); + op->aregs=pmrm->aregs; + im->da->uses|=pmrm->aregs; // Mark registers used to form address + // Get displacement, if any. + im->dispsize=pmrm->dispsize; + if (pmrm->dispsize!=0) { + if (cmdsizesize) { + im->da->errors|=DAE_CROSS; // Command crosses end of memory block + return -1; }; + if (pmrm->dispsize==1) // 8-bit displacement is sign-extended + op->opconst=im->da->memconst=(signed char)cmd[im->modsize]; + else if (pmrm->dispsize==4) { // 32-bit full displacement + im->da->memfixup= + im->mainsize+im->modsize; // Possible 32-bit fixup + op->opconst=im->da->memconst=*(ulong *)(cmd+im->modsize); } + else // 16-bit displacement, very rare + op->opconst=im->da->memconst=*(ushort *)(cmd+im->modsize); + ; + }; + // Get segment. + op->seg=Getsegment(im,op->arg,pmrm->defseg); + // Warn if memory contents is 16-bit jump/call destination. + if (datasize==2 && (op->arg & B_MODMASK)==B_JMPCALL) + im->da->warnings|=DAW_JMP16; + // Decode memory operand to text, if requested. + if (im->damode & DA_TEXT) { + ardec=(im->config->disasmmode==DAMODE_ATT?pmrm->aratt:pmrm->ardec); + Memaddrtotext(im,op->arg,datasize,op->seg,ardec,op->opconst,op->text); + }; + return pmrm->size; +}; + +// Decodes 16/32-bit immediate address (used only for 8/16/32-bit memory- +// accumulator moves). ATTENTION, calling routine must set usesdatasize by +// itself! +static void Operandimmaddr(t_imdata *im,ulong datasize,uchar *cmd, + ulong cmdsize,t_operand *op) { + if (im->prefixlist & PF_ASIZE) + im->dispsize=2; + else + im->dispsize=4; + if (cmdsizedispsize) { + im->da->errors|=DAE_CROSS; // Command crosses end of memory block + return; }; + op->features=OP_MEMORY|OP_OPCONST; + op->opsize=op->granularity=datasize; + op->reg=REG_UNDEF; + im->usesaddrsize=1; // Address size prefix is meaningful + im->usessegment=1; // Segment override prefix is meaningful + if (im->dispsize==4) { // 32-bit immediate address + // 32-bit address means possible fixup, calculate offset. + im->da->memfixup=im->mainsize; + op->opconst=im->da->memconst=*(ulong *)cmd; } + else { // 16-bit immediate address, very rare + op->opconst=im->da->memconst=*(ushort *)cmd; + op->features|=OP_ADDR16; }; + // Get segment. + op->seg=Getsegment(im,op->arg,SEG_DS); + // Decode memory operand to text, if requested. + if (im->damode & DA_TEXT) + Memaddrtotext(im,op->arg,datasize,op->seg,T(""),op->opconst,op->text); + ; +}; + +// Decodes simple register address ([reg16] or [reg32]). Flag changesreg must +// be 0 if register remains unchanged and 1 if it changes. If fixseg is set to +// SEG_UNDEF, assumes overridable DS:, otherwise assumes fixsegment that cannot +// be overriden with segment prefix. If fixaddrsize is 2 or 4, assumes 16- or +// 32-bit addressing only, otherwise uses default. ATTENTION, calling routine +// must set usesdatasize by itself! +static void Operandindirect(t_imdata *im,int index,int changesreg,int fixseg, + int fixaddrsize,ulong datasize,t_operand *op) { + int n; + ulong originallist; + tchar ardec[SHORTNAME]; + op->features=OP_MEMORY|OP_INDEXED; + if (changesreg) { + op->features|=OP_MODREG; + op->reg=index; + im->da->modifies|=(1<reg=REG_UNDEF; + if (fixaddrsize==2) + op->features|=OP_ADDR16; + else if (fixaddrsize==0) { + im->usesaddrsize=1; // Address size prefix is meaningful + if (im->prefixlist & PF_ASIZE) { + op->features|=OP_ADDR16; + fixaddrsize=2; + }; + }; + // Get segment. + if (fixseg==SEG_UNDEF) { + op->seg=Getsegment(im,op->arg,SEG_DS); + im->usessegment=1; } // Segment override prefix is meaningful + else + op->seg=fixseg; + op->opsize=datasize; + op->granularity=datasize; // Default, may be overriden later + op->scale[index]=1; + op->aregs=(1<da->uses|=(1<arg & B_MODMASK)==B_JMPCALL) + im->da->warnings|=DAW_JMP16; + // Decode source operand to text, if requested. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) { + ardec[0]=T('%'); n=1; } + else + n=0; + if (fixaddrsize==2) + Tstrcopy(ardec+n,SHORTNAME-n,regname16[index]); + else + Tstrcopy(ardec+n,SHORTNAME-n,regname32[index]); + if (fixseg==SEG_UNDEF) + Memaddrtotext(im,op->arg,datasize,op->seg,ardec,0,op->text); + else { + originallist=im->prefixlist; + im->prefixlist&=~PF_SEGMASK; + Memaddrtotext(im,op->arg,datasize,op->seg,ardec,0,op->text); + im->prefixlist=originallist; + }; + }; +}; + +// Decodes XLAT source address ([(E)BX+AL]). Note that I set scale of EAX to 1, +// which is not exactly true. ATTENTION, calling routine must set usesdatasize +// by itself! +static void Operandxlat(t_imdata *im,t_operand *op) { + tchar *ardec; + op->features=OP_MEMORY|OP_INDEXED; + if (im->prefixlist & PF_ASIZE) + op->features|=OP_ADDR16; + im->usesaddrsize=1; // Address size prefix is meaningful + im->usessegment=1; // Segment override prefix is meaningful + op->opsize=1; + op->granularity=1; + op->reg=REG_UNDEF; + // Get segment. + op->seg=Getsegment(im,op->arg,SEG_DS); + op->scale[REG_EAX]=1; // This is not correct! + op->scale[REG_EBX]=1; + op->aregs=(1<da->uses|=op->aregs; + // Decode address to text, if requested. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + ardec=(im->prefixlist & PF_ASIZE?T("%BX,%AL"):T("%EBX,%AL")); + else + ardec=(im->prefixlist & PF_ASIZE?T("BX+AL"):T("EBX+AL")); + Memaddrtotext(im,op->arg,1,op->seg,ardec,0,op->text); + }; +}; + +// Decodes stack pushes of any size, including implicit return address in +// CALLs. ATTENTION, calling routine must set usesdatasize by itself! +static void Operandpush(t_imdata *im,ulong datasize,t_operand *op) { + int n,addrsize; + ulong originallist; + tchar ardec[SHORTNAME]; + op->features=OP_MEMORY|OP_INDEXED|OP_MODREG; + op->reg=REG_ESP; + op->aregs=(1<da->modifies|=op->aregs; + im->usesaddrsize=1; // Address size prefix is meaningful + if (im->prefixlist & PF_ASIZE) { + op->features|=OP_ADDR16; + addrsize=2; } + else + addrsize=4; // Flat model! + op->seg=SEG_SS; + if ((op->arg & B_ARGMASK)==B_PUSHA) { + im->da->uses=0xFF; // Uses all general registers + op->opsize=datasize*8; } + else if ((op->arg & B_ARGMASK)==B_PUSHRETF) { + im->da->uses|=op->aregs; + op->opsize=datasize*2; } + else { + im->da->uses|=op->aregs; + // Warn if memory contents is 16-bit jump/call destination. + if (datasize==2 && (op->arg & B_MODMASK)==B_JMPCALL) + im->da->warnings|=DAW_JMP16; + op->opsize=datasize; + }; + op->opconst=-(long)op->opsize; // ESP is predecremented + op->granularity=datasize; // Default, may be overriden later + op->scale[REG_ESP]=1; + // Decode source operand to text, if requested. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) { + ardec[0]=T('%'); n=1; } + else + n=0; + if (addrsize==2) + Tstrcopy(ardec+n,SHORTNAME-n,regname16[REG_ESP]); + else + Tstrcopy(ardec+n,SHORTNAME-n,regname32[REG_ESP]); + originallist=im->prefixlist; + im->prefixlist&=~PF_SEGMASK; + Memaddrtotext(im,op->arg,datasize,op->seg,ardec,0,op->text); + im->prefixlist=originallist; + }; +}; + +// Decodes segment register. +static void Operandsegreg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_SEGREG; + if (index>=NSEG) { + op->features|=OP_INVALID; // Invalid segment register + im->da->errors|=DAE_BADSEG; }; + op->opsize=op->granularity=2; + op->reg=index; + op->seg=SEG_UNDEF; // Because this is not a memory address + if (op->arg & (B_CHG|B_UPD)) + im->da->warnings|=DAW_SEGMOD; // Modifies segment register + // Decode name of segment register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + Tcopycase(op->text+n,TEXTLEN-n,segname[index],im->config->lowercase); + }; +}; + +// Decodes FPU register operand. +static void Operandfpureg(t_imdata *im,int index,t_operand *op) { + op->features=OP_FPUREG; + op->opsize=op->granularity=10; + op->reg=index; + op->seg=SEG_UNDEF; // Because this is not a memory address + // Decode name of FPU register. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) { + if (im->config->simplifiedst && index==0) + Tcopycase(op->text,TEXTLEN,T("%ST"),im->config->lowercase); + else { + op->text[0]=T('%'); + Tcopycase(op->text+1,TEXTLEN-1,fpushort[index],im->config->lowercase); + }; } + else if (im->config->simplifiedst && index==0) + Tcopycase(op->text,TEXTLEN,T("ST"),im->config->lowercase); + else if (im->config->disasmmode!=DAMODE_HLA) + Tcopycase(op->text,TEXTLEN,fpulong[index],im->config->lowercase); + else + Tcopycase(op->text,TEXTLEN,fpushort[index],im->config->lowercase); + ; + }; +}; + +// Decodes MMX register operands. ATTENTION, does not set correct granularity! +static void Operandmmxreg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_MMXREG; + op->opsize=8; + op->granularity=4; // Default, correct it later! + op->reg=index; + op->seg=SEG_UNDEF; + // Decode name of MMX/3DNow! register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + Tcopycase(op->text+n,TEXTLEN-n,mmxname[index],im->config->lowercase); + }; +}; + +// Decodes 3DNow! register operands. ATTENTION, does not set correct +// granularity! +static void Operandnowreg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_3DNOWREG; + op->opsize=8; + op->granularity=4; // Default, correct it later! + op->reg=index; + op->seg=SEG_UNDEF; + // Decode name of MMX/3DNow! register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + Tcopycase(op->text+n,TEXTLEN-n,mmxname[index],im->config->lowercase); + }; +}; + +// Decodes SSE register operands. ATTENTION, does not set correct granularity! +static void Operandssereg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_SSEREG; + if (op->arg & B_NOVEXSIZE) + op->opsize=16; + else + op->opsize=im->ssesize; + op->granularity=4; // Default, correct it later! + op->reg=index; + op->seg=SEG_UNDEF; + // Note that some rare SSE commands may use Reg without ModRM. + if (im->modsize==0) + im->modsize=1; + // Decode name of SSE register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + if (op->opsize==32) + Tcopycase(op->text+n,TEXTLEN-n,sse256[index],im->config->lowercase); + else + Tcopycase(op->text+n,TEXTLEN-n,sse128[index],im->config->lowercase); + ; + }; +}; + +// Decodes flag register EFL. +static void Operandefl(t_imdata *im,ulong datasize,t_operand *op) { + op->features=OP_OTHERREG; + op->opsize=op->granularity=datasize; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + // Decode name of register. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + Tcopycase(op->text,TEXTLEN,T("%EFL"),im->config->lowercase); + else + Tcopycase(op->text,TEXTLEN,T("EFL"),im->config->lowercase); + ; + }; +}; + +// Decodes 8/16/32-bit immediate jump/call offset relative to EIP of next +// command. +static void Operandoffset(t_imdata *im,ulong offsetsize,ulong datasize, + uchar *cmd,ulong cmdsize,ulong offsaddr,t_operand *op) { + int n; + tchar label[TEXTLEN]; + if (cmdsizeda->errors|=DAE_CROSS; // Command crosses end of memory block + return; }; + op->features=OP_CONST; + op->opsize=op->granularity=datasize; // NOT offsetsize! + im->immsize1=offsetsize; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + offsaddr+=offsetsize; + if (offsetsize==1) // Sign-extandable constant + op->opconst=*(signed char *)cmd+offsaddr; + else if (offsetsize==2) // 16-bit immediate offset, rare + op->opconst=*(ushort *)cmd+offsaddr; + else // 32-bit immediate offset + op->opconst=*(ulong *)cmd+offsaddr; + if (datasize==2) { + op->opconst&=0x0000FFFF; + im->da->warnings|=DAW_JMP16; }; // Practically unused in Win32 code + im->usesdatasize=1; + // Decode address of destination to text, if requested. + if (im->damode & DA_TEXT) { + if (offsetsize==1 && im->config->disasmmode!=DAMODE_HLA && + im->config->disasmmode!=DAMODE_ATT) + n=Tcopycase(op->text,TEXTLEN,T("SHORT "),im->config->lowercase); + else + n=0; + if (datasize==4) { + if (im->decodeaddress!=NULL && + im->decodeaddress(label,op->opconst)!=0) + Tstrcopy(op->text+n,TEXTLEN-n,label); + else { + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + Hexprint(4,op->text+n,op->opconst,im,op->arg); + }; } + else { + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + Hexprint(2,op->text+n,op->opconst,im,op->arg); + }; + }; +}; + +// Decodes 16:16/16:32-bit immediate absolute far jump/call address. +static void Operandimmfaraddr(t_imdata *im,ulong datasize,uchar *cmd, + ulong cmdsize,t_operand *op) { + int n; + if (cmdsizeda->errors|=DAE_CROSS; // Command crosses end of memory block + return; }; + op->features=OP_CONST|OP_SELECTOR; + op->opsize=datasize+2; + op->granularity=datasize; // Attention, non-standard case! + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + im->immsize1=datasize; + im->immsize2=2; + if (datasize==2) { + op->opconst=*(ushort *)cmd; + im->da->warnings|=DAW_JMP16; } // Practically unused in Win32 code + else { + op->opconst=*(ulong *)cmd; + im->da->immfixup=im->mainsize; }; + op->selector=*(ushort *)(cmd+datasize); + im->usesdatasize=1; + // Decode address of destination to text, if requested. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) { + op->text[0]=T('$'); n=1; } + else + n=Tcopycase(op->text,TEXTLEN,T("FAR "),im->config->lowercase); + n+=Hexprint(2,op->text+n,op->selector,im,op->arg); + op->text[n++]=T(':'); + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + Hexprint(4,op->text+n,op->opconst,im,op->arg); + }; +}; + +// Decodes immediate constant 1 used in shift operations. +static void Operandone(t_imdata *im,t_operand *op) { + op->features=OP_CONST; + op->opsize=op->granularity=1; // Just to make it defined + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + op->opconst=1; + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + Tstrcopy(op->text,TEXTLEN,T("$1")); + else + Tstrcopy(op->text,TEXTLEN,T("1")); + ; + }; +}; + +// Decodes 8/16/32-bit immediate constant (possibly placed after ModRegRM-SIB- +// Disp combination). Constant is nbytes long in the command and extends to +// constsize bytes. If constant is a count, it deals with data of size datasize. +// ATTENTION, calling routine must set usesdatasize by itself! +static void Operandimmconst(t_imdata *im,ulong nbytes,ulong constsize, + ulong datasize,uchar *cmd,ulong cmdsize,int issecond,t_operand *op) { + int n; + ulong u,mod; + tchar label[TEXTLEN]; + if (cmdsizemodsize+im->dispsize+nbytes+(issecond?im->immsize1:0)) { + im->da->errors|=DAE_CROSS; // Command crosses end of memory block + return; }; + op->features=OP_CONST; + op->opsize=op->granularity=constsize; + cmd+=im->modsize+im->dispsize; + if (issecond==0) + im->immsize1=nbytes; // First constant + else { + im->immsize2=nbytes; // Second constant (ENTER only) + cmd+=im->immsize1; }; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + if (nbytes==4) { // 32-bit immediate constant + op->opconst=*(ulong *)cmd; + im->da->immfixup=im->mainsize+im->modsize+im->dispsize+ + (issecond?im->immsize1:0); + ; } + else if (nbytes==1) // 8-byte constant, maybe sign-extendable + op->opconst=*(signed char *)cmd; + else // 16-bite immediate constant, rare + op->opconst=*(ushort *)cmd; + if (constsize==1) + op->opconst&=0x000000FF; + else if (constsize==2) + op->opconst&=0x0000FFFF; + switch (op->arg & B_MODMASK) { + case B_BITCNT: // Constant is a bit count + if ((datasize==4 && op->opconst>31) || + (datasize==1 && op->opconst>7) || + (datasize==2 && op->opconst>15)) im->da->warnings|=DAW_SHIFT; + break; + case B_SHIFTCNT: // Constant is a shift count + if (op->opconst==0 || + (datasize==4 && op->opconst>31) || (datasize==1 && op->opconst>7) || + (datasize==2 && op->opconst>15)) im->da->warnings|=DAW_SHIFT; + break; + case B_STACKINC: // Stack increment must be DWORD-aligned + if ((op->opconst & 0x3)!=0) + im->da->warnings|=DAW_STACK; + im->da->stackinc=op->opconst; + break; + default: break; }; + if (im->damode & DA_TEXT) { + mod=op->arg & B_MODMASK; + n=0; + if (constsize==1) { // 8-bit constant + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + Hexprint(1,op->text+n,op->opconst,im,op->arg); } + else if (constsize==4) { // 32-bit constant + if (im->decodeaddress!=NULL && + (mod==B_NONSPEC || mod==B_JMPCALL || mod==B_JMPCALLFAR) && + im->decodeaddress(label,op->opconst)!=0) + Tstrcopy(op->text+n,TEXTLEN-n,label); + else { + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + if (mod!=B_UNSIGNED && mod!=B_BINARY && mod!=B_PORT && + (long)op->opconst<0 && + (mod==B_SIGNED || (long)op->opconst>NEGLIMIT) + ) { + op->text[n++]=T('-'); u=-(long)op->opconst; } + else + u=op->opconst; + Hexprint(4,op->text+n,u,im,op->arg); + }; } + else { // 16-bit constant + if (im->config->disasmmode==DAMODE_ATT) + op->text[n++]=T('$'); + else if ((op->arg & B_SHOWSIZE)!=0) { + n+=Tcopycase(op->text+n,TEXTLEN-n,sizename[constsize], + im->config->lowercase); + n+=Tstrcopy(op->text+n,TEXTLEN-n,T(" ")); }; + Hexprint(2,op->text+n,op->opconst,im,op->arg); + }; + }; + return; +}; + +// Decodes contrtol register operands. +static void Operandcreg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_CREG; + op->opsize=op->granularity=4; + op->reg=index; + op->seg=SEG_UNDEF; + // Decode name of control register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + Tcopycase(op->text+n,TEXTLEN-n,crname[index],im->config->lowercase); }; + // Some control registers are physically absent. + if (index!=0 && index!=2 && index!=3 && index!=4) + im->da->errors|=DAE_BADCR; + ; +}; + +// Decodes debug register operands. +static void Operanddreg(t_imdata *im,int index,t_operand *op) { + int n; + op->features=OP_DREG; + op->opsize=op->granularity=4; + op->reg=index; + op->seg=SEG_UNDEF; + // Decode name of debug register. + if (im->damode & DA_TEXT) { + n=0; + if (im->config->disasmmode==DAMODE_ATT) op->text[n++]=T('%'); + Tcopycase(op->text+n,TEXTLEN-n,drname[index],im->config->lowercase); + }; +}; + +// Decodes FPU status register FST. +static void Operandfst(t_imdata *im,t_operand *op) { + op->features=OP_OTHERREG; + op->opsize=op->granularity=2; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + // Decode name of register. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + Tcopycase(op->text,TEXTLEN,T("%FST"),im->config->lowercase); + else + Tcopycase(op->text,TEXTLEN,T("FST"),im->config->lowercase); + ; + }; +}; + +// Decodes FPU control register FCW. +static void Operandfcw(t_imdata *im,t_operand *op) { + op->features=OP_OTHERREG; + op->opsize=op->granularity=2; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + // Decode name of register. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + Tcopycase(op->text,TEXTLEN,T("%FCW"),im->config->lowercase); + else + Tcopycase(op->text,TEXTLEN,T("FCW"),im->config->lowercase); + ; + }; +}; + +// Decodes SSE control register MXCSR. +static void Operandmxcsr(t_imdata *im,t_operand *op) { + op->features=OP_OTHERREG; + op->opsize=op->granularity=4; + op->reg=REG_UNDEF; + op->seg=SEG_UNDEF; + // Decode name of register. + if (im->damode & DA_TEXT) { + if (im->config->disasmmode==DAMODE_ATT) + Tcopycase(op->text,TEXTLEN,T("%MXCSR"),im->config->lowercase); + else + Tcopycase(op->text,TEXTLEN,T("MXCSR"),im->config->lowercase); + ; + }; +}; + + +//////////////////////////////////////////////////////////////////////////////// +///////////////////////////////// DISASSEMBLER ///////////////////////////////// + +// Disassembles first command in the binary code of given length at given +// address. Assumes that address and data size attributes of all participating +// segments are 32 bit (flat model). Returns length of the command or 0 in case +// of severe error. +ulong Disasm(uchar const *cmd,ulong cmdsize,ulong ip,t_disasm *da, + int damode,t_config *config,int (*decodeaddress)(tchar *s,ulong addr)) { + int i,j,k,q,noperand,nout,enclose,vexreg,success,cfill,ofill; + ulong m,n,u,prefix,prefixmask,code,arg,cmdtype,datasize; + ulong type,vex,vexlead; + t_imdata im; + const t_chain *pchain; + const t_bincmd *pcmd; + const t_modrm *pmrm; + t_operand *op,pseudoop; + // Verify input parameters. + if (cmd==NULL || cmdsize==0 || da==NULL || cmdchain==NULL) + return 0; // Error in parameters or uninitialized + // Initialize t_disasm structure that receives results of disassembly. This + // structure is very large, memset() or several memset()'s would take much, + // much longer. + da->ip=ip; + da->memfixup=da->immfixup=-1; + da->errors=DAE_NOERR; + da->warnings=DAW_NOWARN; + da->uses=0; + da->modifies=0; + da->memconst=0; + da->stackinc=0; + for (i=0,op=da->op; ifeatures=0; + op->arg=0; + op->opsize=op->granularity=0; + op->reg=REG_UNDEF; + op->uses=0; + op->modifies=0; + op->seg=SEG_UNDEF; + ((ulong *)op->scale)[0]=0; + ((ulong *)op->scale)[1]=0; + op->aregs=0; + op->opconst=0; + op->selector=0; + op->text[0]=T('\0'); }; + da->dump[0]=T('\0'); + da->result[0]=T('\0'); + da->masksize=0; + // Prepare intermediate data. This data allows to keep Disasm() reentrant + // (thread-safe). + im.da=da; + im.damode=damode; + if (config==NULL) + im.config=config=&defconfig; // Use default configuration + else + im.config=config; + im.decodeaddress=decodeaddress; + im.prefixlist=0; + im.ssesize=16; // Default + im.immsize1=im.immsize2=0; + // Correct 80x86 command may contain up to 4 prefixes belonging to different + // prefix groups. If Disasm() detects second prefix from the same group, it + // flushes first prefix in the sequence as a pseudocommand. (This is not + // quite true; all CPUs that I have tested accept repeating prefixes. Still, + // who will place superfluous and possibly nonportable prefixes into the + // code?) + for (n=0; ; n++) { + if (n>=cmdsize) { // Command crosses end of memory block + n=0; im.prefixlist=0; // Decode as standalone prefix + break; }; + // Note that some CPUs treat REPx and LOCK as belonging to the same group. + switch (cmd[n]) { + case 0x26: prefix=PF_ES; prefixmask=PF_SEGMASK; break; + case 0x2E: prefix=PF_CS; prefixmask=PF_SEGMASK; break; + case 0x36: prefix=PF_SS; prefixmask=PF_SEGMASK; break; + case 0x3E: prefix=PF_DS; prefixmask=PF_SEGMASK; break; + case 0x64: prefix=PF_FS; prefixmask=PF_SEGMASK; break; + case 0x65: prefix=PF_GS; prefixmask=PF_SEGMASK; break; + case 0x66: prefix=prefixmask=PF_DSIZE; break; + case 0x67: prefix=prefixmask=PF_ASIZE; break; + case 0xF0: prefix=prefixmask=PF_LOCK; break; + case 0xF2: prefix=PF_REPNE; prefixmask=PF_REPMASK; break; + case 0xF3: prefix=PF_REP; prefixmask=PF_REPMASK; break; + default: prefix=0; break; }; + if (prefix==0) + break; + if (im.prefixlist & prefixmask) { + da->errors|=DAE_SAMEPREF; // Two prefixes from the same group + break; }; + im.prefixlist|=prefix; + }; + // There may be VEX prefix preceding command body. Yes, VEX is supported in + // the 32-bit mode! And even in the 16-bit, but who cares? + vex=0; vexlead=0; + if (cmdsize>=n+3 && (*(ushort *)(cmd+n) & 0xC0FE)==0xC0C4) { + // VEX is not compatible with LOCK, 66, F2 and F3 prefixes. VEX is not + // compatible with REX, too, but REX prefixes are missing in 32-bit mode. + if (im.prefixlist & (PF_LOCK|PF_66|PF_F2|PF_F3)) + da->errors|=DAE_SAMEPREF; // Incompatible prefixes + else { + if (cmd[n]==0xC5) { + // 2-byte VEX prefix. + im.prefixlist|=PF_VEX2; + vex=cmd[n+1]; + vexlead=DX_VEX|DX_LEAD0F; n+=2; } + else { + // 3-byte VEX prefix. + im.prefixlist|=PF_VEX3; + vex=cmd[n+2]+(cmd[n+1]<<8); // Note the order of the bytes! + switch (vex & 0x1F00) { + case 0x0100: vexlead=DX_VEX|DX_LEAD0F; n+=3; break; + case 0x0200: vexlead=DX_VEX|DX_LEAD38; n+=3; break; + case 0x0300: vexlead=DX_VEX|DX_LEAD3A; n+=3; break; + default: vex=0; break; // Unsupported VEX, decode as LES + }; + }; + if (vex!=0) { + // Get size of operands. + if (vex & 0x0004) + im.ssesize=32; // 256-bit SSE operands + // Get register encoded in VEX prefix. + vexreg=(~vex>>3) & 0x07; + // Check for SIMD prefix. + switch (vex & 0x3) { + case 0x0001: im.prefixlist|=PF_66; break; + case 0x0002: im.prefixlist|=PF_F3; break; + case 0x0003: im.prefixlist|=PF_F2; break; + }; + }; + }; + if (n>=cmdsize) { // Command crosses end of memory block + n=0; vex=0; im.prefixlist=0; // Decode as LES + }; + }; + // We have gathered all prefixes, including those that are integral part of + // the SSE command. + if (n>4 || (da->errors & DAE_SAMEPREF)!=0) { + if (n>4) da->errors|=DAE_MANYPREF; + n=0; im.prefixlist=0; }; // Decode as standalone prefix + da->prefixes=im.prefixlist; + da->nprefix=n; + // Fetch first 4 bytes of the command and find start of command chain in the + // command table. + if (cmdsize>=n+sizeof(ulong)) + code=*(ulong *)(cmd+n); // Optimization for most frequent case + else { + code=cmd[n]; + if (cmdsize>n+1) ((uchar *)&code)[1]=cmd[n+1]; + if (cmdsize>n+2) ((uchar *)&code)[2]=cmd[n+2]; + if (cmdsize>n+3) ((uchar *)&code)[3]=cmd[n+3]; }; + // Walk chain and search for matching command. Command is matched if: + // (1) code bits allowed in mask coincide in command and descriptor; + // (2) when command type contains D_MEMORY, ModRegRM byte must indicate + // memory, and when type contains D_REGISTER, Mod must indicate register; + // (3) when bits D_DATAxx or D_ADDRxx are set, size of data and/or code must + // match these bits; + // (4) field D_MUSTMASK must match gathered prefixes; + // (5) presence or absence of VEX prefix must be matched by DX_VEX. If VEX + // is present, implied leading bytes must match vexlead and bit L must + // match DX_VLMASK; + // (6) if short form of string commands is requested, bit D_LONGFORM must be + // cleared, or segment override prefix other that DS:, or address size + // prefix must be present; + // (7) when bit D_POSTBYTE is set, byte after ModRegRM/SIB/offset must match + // postbyte. Note that all postbyted commands include memory address in + // ModRegRM form and do not include immediate constants; + // (8) if alternative forms of conditional commands are requested, command + // is conditional, and it is marked as DX_ZEROMASK or DX_CARRYMASK, + // check whether these bits match damode. (Conditional branch on flag + // Z!=0 can be disassembled either as JZ or JE. First form is preferrable + // after SUB or DEC; second form is more natural after CMP); + // (9) if command has mnemonics RETN but alternative form RET is expected, + // skip it - RET will follow. + success=0; + for (pchain=cmdchain+(code & CMDMASK); ; pchain=pchain->pnext) { + if (pchain==NULL || pchain->pcmd==NULL) + break; // End of chain, no match + pcmd=pchain->pcmd; + if (((code ^ pcmd->code) & pcmd->mask)!=0) + continue; // (1) Different code bits + cmdtype=pcmd->cmdtype; + if ((damode & DA_TEXT)!=0) { + if ((pcmd->exttype & DX_RETN)!=0 && config->useretform!=0) + continue; // (9) RET form of near return expected + if ((cmdtype & D_COND)!=0 && + (pcmd->exttype & (DX_ZEROMASK|DX_CARRYMASK))!=0 + ) { + if ((damode & DA_JZ)!=0 && (pcmd->exttype & DX_ZEROMASK)==DX_JE) + continue; // (8) Wait for DX_JZ + if ((damode & DA_JC)!=0 && (pcmd->exttype & DX_CARRYMASK)==DX_JB) + continue; // (8) Wait for DX_JC + ; + }; + }; + if ((pcmd->exttype & (DX_VEX|DX_LEADMASK))!=vexlead) + continue; // (5) Unmatched VEX prefix + if (pcmd->exttype & DX_VEX) { + if (((pcmd->exttype & DX_VLMASK)==DX_LSHORT && (vex & 0x04)!=0) || + ((pcmd->exttype & DX_VLMASK)==DX_LLONG && (vex & 0x04)==0)) + continue; // (5) Unmatched VEX.L + ; + }; + if ((cmdtype & + (D_MEMORY|D_REGISTER|D_LONGFORM|D_SIZEMASK|D_MUSTMASK|D_POSTBYTE))==0 + ) { + success=1; break; }; // Optimization for most frequent case + switch (cmdtype & D_MUSTMASK) { + case D_MUST66: // (4) (SSE) Requires 66, no F2 or F3 + if ((im.prefixlist & (PF_66|PF_F2|PF_F3))!=PF_66) continue; + break; + case D_MUSTF2: // (4) (SSE) Requires F2, no 66 or F3 + if ((im.prefixlist & (PF_66|PF_F2|PF_F3))!=PF_F2) continue; + break; + case D_MUSTF3: // (4) (SSE) Requires F3, no 66 or F2 + if ((im.prefixlist & (PF_66|PF_F2|PF_F3))!=PF_F3) continue; + break; + case D_MUSTNONE: // (4) (MMX,SSE) Requires no 66, F2, F3 + if ((im.prefixlist & (PF_66|PF_F2|PF_F3))!=0) continue; + break; + case D_NEEDF2: // (4) (SSE) Requires F2, no F3 + if ((im.prefixlist & (PF_F2|PF_F3))!=PF_F2) continue; + break; + case D_NEEDF3: // (4) (SSE) Requires F3, no F2 + if ((im.prefixlist & (PF_F2|PF_F3))!=PF_F3) continue; + break; + case D_NOREP: // (4) Must not include F2 or F3 + if ((im.prefixlist & (PF_REP|PF_REPNE))!=0) continue; + break; + case D_MUSTREP: // (4) Must include F3 (REP) + case D_MUSTREPE: // (4) Must include F3 (REPE) + if ((im.prefixlist & PF_REP)==0) continue; + break; + case D_MUSTREPNE: // (4) Must include F2 (REPNE) + if ((im.prefixlist & PF_REPNE)==0) continue; + break; + default: break; }; + if ((cmdtype & D_DATA16)!=0 && (im.prefixlist & PF_DSIZE)==0) + continue; // (3) 16-bit data expected + if ((cmdtype & D_DATA32)!=0 && (im.prefixlist & PF_DSIZE)!=0) + continue; // (3) 32-bit data expected + if ((cmdtype & D_ADDR16)!=0 && (im.prefixlist & PF_ASIZE)==0) + continue; // (3) 16-bit address expected + if ((cmdtype & D_ADDR32)!=0 && (im.prefixlist & PF_ASIZE)!=0) + continue; // (3) 32-bit address expected + if ((cmdtype & D_LONGFORM)!=0 && config->shortstringcmds!=0 && + (im.prefixlist & (PF_ES|PF_CS|PF_SS|PF_FS|PF_GS|PF_ASIZE))==0) + continue; // (6) Short form of string cmd expected + if (cmdtype & D_MEMORY) { + // (2) Command expects operand in memory (Mod in ModRegRM is not 11b). + if (n+pcmd->length>=cmdsize) + break; // Command longer than available code + if ((cmd[n+pcmd->length] & 0xC0)==0xC0) continue; } + else if (cmdtype & D_REGISTER) { + // (2) Command expects operand in register (Mod in ModRegRM is 11b). + if (n+pcmd->length>=cmdsize) + break; // Command longer than available code + if ((cmd[n+pcmd->length] & 0xC0)!=0xC0) continue; } + if (cmdtype & D_POSTBYTE) { + // Command expects postbyte after ModRegRM/SIB/offset as part of the + // code. If command is longer than available code, immediately report + // match - error will be reported elsewhere. + m=n+pcmd->length; // Offset to ModRegRM byte + if (m>=cmdsize) + break; // Command longer than available code + if (im.prefixlist & PF_ASIZE) + m+=modrm16[cmd[m]].size; // 16-bit address + else { + pmrm=modrm32+cmd[m]; + if (pmrm->psib==NULL) // 32-bit address without SIB + m+=pmrm->size; + else if (m+1>=cmdsize) // Command longer than available code + break; + else // 32-bit address with SIB + m+=pmrm->psib[cmd[m+1]].size; + ; + }; + if (m>=cmdsize) + break; // Command longer than available code + // Asterisk in SSE and AVX commands means comparison predicate. Check + // for predefined range. + if (cmd[m]==(uchar)pcmd->postbyte || + ((cmdtype & D_WILDCARD)!=0 && cmd[m]<(pcmd->exttype & DX_VEX?32:8))) + im.immsize1=1; // (7) Interprete postbyte as imm const + else + continue; // (7) + ; + }; + success=1; + break; // Perfect match, command found + }; + // If command is bad but preceded with prefixes, decode first prefix as + // standalone. In this case, list of command's prefixes is empty. + if (success==0) { + pcmd=NULL; + if (im.prefixlist!=0) { + n=0; da->nprefix=0; da->prefixes=im.prefixlist=0; + code=cmd[n] & CMDMASK; + for (pchain=cmdchain+code; ; pchain=pchain->pnext) { + if (pchain==NULL || pchain->pcmd==NULL) { + pcmd=NULL; break; }; // End of chain, no match + pcmd=pchain->pcmd; + if ((pcmd->cmdtype & D_CMDTYPE)!=D_PREFIX) + continue; + if (((code ^ pcmd->code) & pcmd->mask)==0) { + cmdtype=pcmd->cmdtype; + da->errors|=DAE_BADCMD; + break; + }; + }; + }; + // If matching command is still not found, report error and return one byte + // as a command length. + if (pcmd==NULL) { + if (damode & DA_DUMP) + Thexdump(da->dump,cmd,1,config->lowercase); + if (damode & DA_TEXT) { + if (config->disasmmode==DAMODE_HLA) + j=Tcopycase(da->result,TEXTLEN,sizename[1],config->lowercase); + else if (config->disasmmode==DAMODE_ATT) + j=Tcopycase(da->result,TEXTLEN,sizeatt[1],config->lowercase); + else + j=Tcopycase(da->result,TEXTLEN,sizekey[1],config->lowercase); + j+=Tstrcopy(da->result+j,TEXTLEN-j,T(" ")); + Thexdump(da->result+j,cmd,1,config->lowercase); }; + da->size=1; + da->nprefix=0; + da->prefixes=0; + da->cmdtype=D_BAD; + da->exttype=0; + da->errors|=DAE_BADCMD; // Unrecognized command + if (damode & DA_HILITE) { + da->masksize=tstrlen(da->result); + memset(da->mask,DRAW_SUSPECT,da->masksize); }; + return 1; + }; + }; + // Exclude prefixes that are integral part of the command from the list of + // prefixes. First comparison optimizes for the most frequent case of no + // obligatory prefixes. + if (cmdtype & (D_SIZEMASK|D_MUSTMASK)) { + switch (cmdtype & D_MUSTMASK) { + case D_MUST66: // (SSE) Requires 66, no F2 or F3 + case D_MUSTF2: // (SSE) Requires F2, no 66 or F3 + case D_MUSTF3: // (SSE) Requires F3, no 66 or F2 + im.prefixlist&=~(PF_66|PF_F2|PF_F3); break; + case D_NEEDF2: // (SSE) Requires F2, no F3 + case D_NEEDF3: // (SSE) Requires F3, no F2 + im.prefixlist&=~(PF_F2|PF_F3); break; + default: break; }; + if (cmdtype & D_DATA16) // Must include data size prefix + im.prefixlist&=~PF_DSIZE; + if (cmdtype & D_ADDR16) // Must include address size prefix + im.prefixlist&=~PF_ASIZE; + ; + }; + // Prepare for disassembling. + im.modsize=0; // Size of ModRegRM/SIB bytes + im.dispsize=0; // Size of address offset + im.usesdatasize=0; + im.usesaddrsize=0; + im.usessegment=0; + da->cmdtype=cmdtype; + da->exttype=pcmd->exttype; + n+=pcmd->length; // Offset of ModRegRM or imm constant + if (n>cmdsize) { + da->errors|=DAE_CROSS; // Command crosses end of memory block + goto error; }; + im.mainsize=n; // Size of command with prefixes + // Set default data size (note that many commands and operands override it). + if ((cmdtype & D_SIZE01)!=0 && (cmd[n-1] & 0x01)==0) { + if (im.prefixlist & PF_DSIZE) + da->warnings|=DAW_DATASIZE; // Superfluous data size prefix + datasize=1; } + else if (im.prefixlist & PF_DSIZE) + datasize=2; + else + datasize=4; + // Process operands. + noperand=0; + for (i=0; iarg[i]; + if ((arg & B_ARGMASK)==B_NONE) + break; // Optimization for most frequent case + // If pseudooperands to be skipped, I process them nevertheless. Such + // operands may contain important information. + if ((arg & B_PSEUDO)!=0 && (damode & DA_PSEUDO)==0) + op=&pseudoop; // Request to skip pseudooperands + else + op=da->op+noperand++; + op->arg=arg; + switch (arg & B_ARGMASK) { + case B_AL: // Register AL + Operandintreg(&im,1,REG_AL,op); + break; + case B_AH: // Register AH + Operandintreg(&im,1,REG_AH,op); + break; + case B_AX: // Register AX + Operandintreg(&im,2,REG_EAX,op); + break; + case B_CL: // Register CL + Operandintreg(&im,1,REG_CL,op); + break; + case B_CX: // Register CX + Operandintreg(&im,2,REG_ECX,op); + break; + case B_DX: // Register DX + Operandintreg(&im,2,REG_EDX,op); + break; + case B_DXPORT: // Register DX as I/O port address + Operandintreg(&im,2,REG_EDX,op); + op->features|=OP_PORT; + break; + case B_EAX: // Register EAX + Operandintreg(&im,4,REG_EAX,op); + break; + case B_EBX: // Register EBX + Operandintreg(&im,4,REG_EBX,op); + break; + case B_ECX: // Register ECX + Operandintreg(&im,4,REG_ECX,op); + break; + case B_EDX: // Register EDX + Operandintreg(&im,4,REG_EDX,op); + break; + case B_ACC: // Accumulator (AL/AX/EAX) + Operandintreg(&im,datasize,REG_EAX,op); + im.usesdatasize=1; + break; + case B_STRCNT: // Register CX or ECX as REPxx counter + Operandintreg(&im,(im.prefixlist & PF_ASIZE?2:4),REG_ECX,op); + im.usesaddrsize=1; + break; + case B_DXEDX: // Register DX or EDX in DIV/MUL + Operandintreg(&im,datasize,REG_EDX,op); + im.usesdatasize=1; + break; + case B_BPEBP: // Register BP or EBP in ENTER/LEAVE + Operandintreg(&im,datasize,REG_EBP,op); + im.usesdatasize=1; + break; + case B_REG: // 8/16/32-bit register in Reg + // Note that all commands that use B_REG have also another operand + // that requires ModRM, so we don't need to set modsize here. + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + Operandintreg(&im,datasize,(cmd[n]>>3) & 0x07,op); + im.usesdatasize=1; }; + break; + case B_REG16: // 16-bit register in Reg + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else + Operandintreg(&im,2,(cmd[n]>>3) & 0x07,op); + break; + case B_REG32: // 32-bit register in Reg + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else + Operandintreg(&im,4,(cmd[n]>>3) & 0x07,op); + break; + case B_REGCMD: // 16/32-bit register in last cmd byte + Operandintreg(&im,datasize,cmd[n-1] & 0x07,op); + im.usesdatasize=1; + break; + case B_REGCMD8: // 8-bit register in last cmd byte + Operandintreg(&im,1,cmd[n-1] & 0x07,op); + break; + case B_ANYREG: // Reg field is unused, any allowed + break; + case B_INT: // 8/16/32-bit register/memory in ModRM + case B_INT1632: // 16/32-bit register/memory in ModRM + k=Operandmodrm(&im,datasize,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandintreg(&im,datasize,cmd[n] & 0x07,op); + im.usesdatasize=1; + break; + case B_INT8: // 8-bit register/memory in ModRM + k=Operandmodrm(&im,1,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandintreg(&im,1,cmd[n] & 0x07,op); + break; + case B_INT16: // 16-bit register/memory in ModRM + k=Operandmodrm(&im,2,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandintreg(&im,2,cmd[n] & 0x07,op); + break; + case B_INT32: // 32-bit register/memory in ModRM + k=Operandmodrm(&im,4,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandintreg(&im,4,cmd[n] & 0x07,op); + break; + case B_INT64: // 64-bit integer in ModRM, memory only + k=Operandmodrm(&im,8,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as 32-bit register and set error. + Operandintreg(&im,4,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; break; }; + break; + case B_INT128: // 128-bit integer in ModRM, memory only + k=Operandmodrm(&im,16,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as 32-bit register and set error. + Operandintreg(&im,4,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; break; }; + break; + case B_IMMINT: // 8/16/32-bit int at immediate addr + Operandimmaddr(&im,datasize,cmd+n,cmdsize-n,op); + im.usesdatasize=1; + break; + case B_INTPAIR: // Two signed 16/32 in ModRM, memory only + k=Operandmodrm(&im,2*datasize,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + op->granularity=datasize; + if (k==0) { + // Register is not allowed, decode as register and set error. + Operandintreg(&im,datasize,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; break; }; + im.usesdatasize=1; + break; + case B_SEGOFFS: // 16:16/16:32 absolute address in memory + k=Operandmodrm(&im,datasize+2,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode and set error. + Operandintreg(&im,datasize,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; break; }; + im.usesdatasize=1; + break; + case B_STRDEST: // 8/16/32-bit string dest, [ES:(E)DI] + Operandindirect(&im,REG_EDI,1,SEG_ES,0,datasize,op); + im.usesdatasize=1; + break; + case B_STRDEST8: // 8-bit string destination, [ES:(E)DI] + Operandindirect(&im,REG_EDI,1,SEG_ES,0,1,op); + break; + case B_STRSRC: // 8/16/32-bit string source, [(E)SI] + Operandindirect(&im,REG_ESI,1,SEG_UNDEF,0,datasize,op); + im.usesdatasize=1; + break; + case B_STRSRC8: // 8-bit string source, [(E)SI] + Operandindirect(&im,REG_ESI,1,SEG_UNDEF,0,1,op); + break; + case B_XLATMEM: // 8-bit memory in XLAT, [(E)BX+AL] + Operandxlat(&im,op); + break; + case B_EAXMEM: // Reference to memory addressed by [EAX] + Operandindirect(&im,REG_EAX,0,SEG_UNDEF,4,1,op); + break; + case B_LONGDATA: // Long data in ModRM, mem only + k=Operandmodrm(&im,256,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + op->granularity=1; // Just a trick + if (k==0) { + // Register is not allowed, decode and set error. + Operandintreg(&im,4,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; break; }; + im.usesdatasize=1; // Caveat user + break; + case B_ANYMEM: // Reference to memory, data unimportant + k=Operandmodrm(&im,1,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode and set error. + Operandintreg(&im,4,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_STKTOP: // 16/32-bit int top of stack + Operandindirect(&im,REG_ESP,1,SEG_SS,0,datasize,op); + im.usesdatasize=1; + break; + case B_STKTOPFAR: // Top of stack (16:16/16:32 far addr) + Operandindirect(&im,REG_ESP,1,SEG_SS,0,datasize*2,op); + op->granularity=datasize; + im.usesdatasize=1; + break; + case B_STKTOPEFL: // 16/32-bit flags on top of stack + Operandindirect(&im,REG_ESP,1,SEG_SS,0,datasize,op); + im.usesdatasize=1; + break; + case B_STKTOPA: // 16/32-bit top of stack all registers + Operandindirect(&im,REG_ESP,1,SEG_SS,0,datasize*8,op); + op->granularity=datasize; + op->modifies=da->modifies=0xFF; + im.usesdatasize=1; + break; + case B_PUSH: // 16/32-bit int push to stack + case B_PUSHRET: // 16/32-bit push of return address + case B_PUSHRETF: // 16:16/16:32-bit push of far retaddr + case B_PUSHA: // 16/32-bit push all registers + Operandpush(&im,datasize,op); + im.usesdatasize=1; + break; + case B_EBPMEM: // 16/32-bit int at [EBP] + Operandindirect(&im,REG_EBP,1,SEG_SS,0,datasize,op); + im.usesdatasize=1; + break; + case B_SEG: // Segment register in Reg + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else + Operandsegreg(&im,(cmd[n]>>3) & 0x07,op); + break; + case B_SEGNOCS: // Segment register in Reg, but not CS + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + k=(cmd[n]>>3) & 0x07; + Operandsegreg(&im,k,op); + if (k==SEG_SS) + da->exttype|=DX_WONKYTRAP; + if (k==SEG_CS) { + op->features|=OP_INVALID; + da->errors|=DAE_BADSEG; + }; + }; + break; + case B_SEGCS: // Segment register CS + Operandsegreg(&im,SEG_CS,op); + break; + case B_SEGDS: // Segment register DS + Operandsegreg(&im,SEG_DS,op); + break; + case B_SEGES: // Segment register ES + Operandsegreg(&im,SEG_ES,op); + break; + case B_SEGFS: // Segment register FS + Operandsegreg(&im,SEG_FS,op); + break; + case B_SEGGS: // Segment register GS + Operandsegreg(&im,SEG_GS,op); + break; + case B_SEGSS: // Segment register SS + Operandsegreg(&im,SEG_SS,op); + break; + case B_ST: // 80-bit FPU register in last cmd byte + Operandfpureg(&im,cmd[n-1] & 0x07,op); + break; + case B_ST0: // 80-bit FPU register ST0 + Operandfpureg(&im,0,op); + break; + case B_ST1: // 80-bit FPU register ST1 + Operandfpureg(&im,1,op); + break; + case B_FLOAT32: // 32-bit float in ModRM, memory only + k=Operandmodrm(&im,4,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as FPU register and set error. + Operandfpureg(&im,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_FLOAT64: // 64-bit float in ModRM, memory only + k=Operandmodrm(&im,8,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as FPU register and set error. + Operandfpureg(&im,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_FLOAT80: // 80-bit float in ModRM, memory only + k=Operandmodrm(&im,10,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as FPU register and set error. + Operandfpureg(&im,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_BCD: // 80-bit BCD in ModRM, memory only + k=Operandmodrm(&im,10,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as FPU register and set error. + Operandfpureg(&im,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_MREG8x8: // MMX register as 8 8-bit integers + case B_MREG16x4: // MMX register as 4 16-bit integers + case B_MREG32x2: // MMX register as 2 32-bit integers + case B_MREG64: // MMX register as 1 64-bit integer + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + Operandmmxreg(&im,(cmd[n]>>3) & 0x07,op); + op->granularity=Getgranularity(arg); }; + break; + case B_MMX8x8: // MMX reg/memory as 8 8-bit integers + case B_MMX16x4: // MMX reg/memory as 4 16-bit integers + case B_MMX32x2: // MMX reg/memory as 2 32-bit integers + case B_MMX64: // MMX reg/memory as 1 64-bit integer + k=Operandmodrm(&im,8,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandmmxreg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_MMX8x8DI: // MMX 8 8-bit integers at [DS:(E)DI] + Operandindirect(&im,REG_EDI,0,SEG_UNDEF,0,8,op); + op->granularity=Getgranularity(arg); + break; + case B_3DREG: // 3DNow! register as 2 32-bit floats + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + Operandnowreg(&im,(cmd[n]>>3) & 0x07,op); + op->granularity=4; }; + break; + case B_3DNOW: // 3DNow! reg/memory as 2 32-bit floats + k=Operandmodrm(&im,8,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandnowreg(&im,cmd[n] & 0x07,op); + op->granularity=4; + break; + case B_SREGF32x4: // SSE register as 4 32-bit floats + case B_SREGF32L: // Low 32-bit float in SSE register + case B_SREGF32x2L: // Low 2 32-bit floats in SSE register + case B_SREGF64x2: // SSE register as 2 64-bit floats + case B_SREGF64L: // Low 64-bit float in SSE register + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + Operandssereg(&im,(cmd[n]>>3) & 0x07,op); + op->granularity=Getgranularity(arg); }; + break; + case B_SVEXF32x4: // SSE reg in VEX as 4 32-bit floats + case B_SVEXF32L: // Low 32-bit float in SSE in VEX + case B_SVEXF64x2: // SSE reg in VEX as 2 64-bit floats + case B_SVEXF64L: // Low 64-bit float in SSE in VEX + Operandssereg(&im,vexreg,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEF32x4: // SSE reg/memory as 4 32-bit floats + case B_SSEF64x2: // SSE reg/memory as 2 64-bit floats + k=Operandmodrm(&im, + (arg & B_NOVEXSIZE?16:im.ssesize),cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEF32L: // Low 32-bit float in SSE reg/memory + k=Operandmodrm(&im,4,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) // Operand in SSE register + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=4; + break; + case B_SSEF32x2L: // Low 2 32-bit floats in SSE reg/memory + k=Operandmodrm(&im, + (arg & B_NOVEXSIZE?16:im.ssesize)/2,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) // Operand in SSE register + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=4; + break; + case B_SSEF64L: // Low 64-bit float in SSE reg/memory + k=Operandmodrm(&im,8,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) // Operand in SSE register + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=8; + break; + case B_XMM0I32x4: // XMM0 as 4 32-bit integers + case B_XMM0I64x2: // XMM0 as 2 64-bit integers + case B_XMM0I8x16: // XMM0 as 16 8-bit integers + Operandssereg(&im,0,op); + op->granularity=Getgranularity(arg); + break; + case B_SREGI8x16: // SSE register as 16 8-bit sigints + case B_SREGI16x8: // SSE register as 8 16-bit sigints + case B_SREGI32x4: // SSE register as 4 32-bit sigints + case B_SREGI64x2: // SSE register as 2 64-bit sigints + case B_SREGI32L: // Low 32-bit sigint in SSE register + case B_SREGI32x2L: // Low 2 32-bit sigints in SSE register + case B_SREGI64L: // Low 64-bit sigint in SSE register + if (n>=cmdsize) + da->errors|=DAE_CROSS; // Command crosses end of memory block + else { + Operandssereg(&im,(cmd[n]>>3) & 0x07,op); + op->granularity=Getgranularity(arg); }; + break; + case B_SVEXI8x16: // SSE reg in VEX as 16 8-bit sigints + case B_SVEXI16x8: // SSE reg in VEX as 8 16-bit sigints + case B_SVEXI32x4: // SSE reg in VEX as 4 32-bit sigints + case B_SVEXI64x2: // SSE reg in VEX as 2 64-bit sigints + Operandssereg(&im,vexreg,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEI8x16: // SSE reg/memory as 16 8-bit sigints + case B_SSEI16x8: // SSE reg/memory as 8 16-bit sigints + case B_SSEI32x4: // SSE reg/memory as 4 32-bit sigints + case B_SSEI64x2: // SSE reg/memory as 2 64-bit sigints + k=Operandmodrm(&im, + (arg & B_NOVEXSIZE?16:im.ssesize),cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEI8x8L: // Low 8 8-bit ints in SSE reg/memory + case B_SSEI16x4L: // Low 4 16-bit ints in SSE reg/memory + case B_SSEI32x2L: // Low 2 32-bit sigints in SSE reg/memory + k=Operandmodrm(&im, + (arg & B_NOVEXSIZE?16:im.ssesize)/2,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEI8x4L: // Low 4 8-bit ints in SSE reg/memory + case B_SSEI16x2L: // Low 2 16-bit ints in SSE reg/memory + k=Operandmodrm(&im,4,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEI8x2L: // Low 2 8-bit ints in SSE reg/memory + k=Operandmodrm(&im,2,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) + Operandssereg(&im,cmd[n] & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_SSEI8x16DI: // SSE 16 8-bit sigints at [DS:(E)DI] + Operandindirect(&im,REG_EDI,0,SEG_UNDEF,0, + (arg & B_NOVEXSIZE?16:im.ssesize),op); + op->granularity=1; + break; + case B_EFL: // Flags register EFL + Operandefl(&im,4,op); + break; + case B_FLAGS8: // Flags (low byte) + Operandefl(&im,1,op); + break; + case B_OFFSET: // 16/32 const offset from next command + Operandoffset(&im,datasize,datasize,cmd+n,cmdsize-n,da->ip+n,op); + break; + case B_BYTEOFFS: // 8-bit sxt const offset from next cmd + Operandoffset(&im,1,datasize,cmd+n,cmdsize-n,da->ip+n,op); + break; + case B_FARCONST: // 16:16/16:32 absolute address constant + Operandimmfaraddr(&im,datasize,cmd+n,cmdsize-n,op); + break; + case B_DESCR: // 16:32 descriptor in ModRM + k=Operandmodrm(&im,6,cmd+n,cmdsize-n,op); + if (k<0) break; // Error in address + if (k==0) { + // Register is not allowed, decode as 32-bit register and set error. + Operandintreg(&im,4,cmd[n] & 0x07,op); + op->features|=OP_INVALID; + da->errors|=DAE_MEMORY; }; + break; + case B_1: // Immediate constant 1 + Operandone(&im,op); + break; + case B_CONST8: // Immediate 8-bit constant + Operandimmconst(&im,1,1,datasize,cmd+n,cmdsize-n,0,op); + if (arg & B_PORT) op->features|=OP_PORT; + break; + case B_SIMMI8x16: // SSE reg in immediate 8-bit constant + if (cmdsize-nerrors|=DAE_CROSS; // Command crosses end of memory block + break; }; + im.immsize1=1; + Operandssereg(&im,(cmd[n+im.modsize+im.dispsize]>>4) & 0x07,op); + op->granularity=Getgranularity(arg); + break; + case B_CONST8_2: // Immediate 8-bit const, second in cmd + Operandimmconst(&im,1,1,datasize,cmd+n,cmdsize-n,1,op); + break; + case B_CONST16: // Immediate 16-bit constant + Operandimmconst(&im,2,2,datasize,cmd+n,cmdsize-n,0,op); + break; + case B_CONST: // Immediate 8/16/32-bit constant + case B_CONSTL: // Immediate 16/32-bit constant + Operandimmconst(&im,datasize,datasize,datasize,cmd+n,cmdsize-n,0,op); + im.usesdatasize=1; + break; + case B_SXTCONST: // Immediate 8-bit sign-extended to size + Operandimmconst(&im,1,datasize,datasize,cmd+n,cmdsize-n,0,op); + im.usesdatasize=1; + break; + case B_CR: // Control register in Reg + Operandcreg(&im,(cmd[n]>>3) & 0x07,op); + break; + case B_CR0: // Control register CR0 + Operandcreg(&im,0,op); + break; + case B_DR: // Debug register in Reg + Operanddreg(&im,(cmd[n]>>3) & 0x07,op); + break; + case B_FST: // FPU status register + Operandfst(&im,op); + break; + case B_FCW: // FPU control register + Operandfcw(&im,op); + break; + case B_MXCSR: // SSE media control and status register + Operandmxcsr(&im,op); + break; + default: // Internal error + da->errors|=DAE_INTERN; + break; }; + if ((arg & B_32BITONLY)!=0 && op->opsize!=4) + da->warnings|=DAW_NONCLASS; + if ((arg & B_MODMASK)==B_JMPCALLFAR) + da->warnings|=DAW_FARADDR; + if (arg & B_PSEUDO) op->features|=OP_PSEUDO; + if (arg & (B_CHG|B_UPD)) op->features|=OP_MOD; + }; + if (im.prefixlist!=0) { // Optimization for most frequent case + // If LOCK prefix is present, report error if prefix is not allowed by + // command and warning otherwise. Application code usually doesn't need + // atomic bus access. + if ((im.prefixlist & PF_LOCK)!=0) { + if ((cmdtype & D_LOCKABLE)==0) da->errors|=DAE_LOCK; + else da->warnings|=DAW_LOCK; }; + // Warn if data size prefix is present but not used by command. + if ((im.prefixlist & PF_DSIZE)!=0 && im.usesdatasize==0 && + (pcmd->exttype & DX_TYPEMASK)!=DX_NOP) + da->warnings|=DAW_DATASIZE; + // Warn if address size prefix is present but not used by command. + if ((im.prefixlist & PF_ASIZE)!=0 && im.usesaddrsize==0) + da->warnings|=DAW_ADDRSIZE; + // Warn if segment override prefix is present but command doesn't access + // memory. Prefixes CS: and DS: are also used as branch hints in + // conditional branches. + if ((im.prefixlist & PF_SEGMASK)!=0 && im.usessegment==0) { + if ((cmdtype & D_BHINT)==0 || (im.prefixlist & PF_HINT)==0) + da->warnings|=DAW_SEGPREFIX; }; + // Warn if REPxx prefix is present but not used by command. Attention, + // Intel frequently uses these prefixes for different means! + if (im.prefixlist & PF_REPMASK) { + if (((im.prefixlist & PF_REP)!=0 && (cmdtype & D_MUSTMASK)!=D_MUSTREP && + (cmdtype & D_MUSTMASK)!=D_MUSTREPE) || + ((im.prefixlist & PF_REPNE)!=0 && (cmdtype & D_MUSTMASK)!=D_MUSTREPNE)) + da->warnings|=DAW_REPPREFIX; + }; + }; + // Warn on unaligned stack, I/O and privileged commands. + switch (cmdtype & D_CMDTYPE) { + case D_PUSH: + if (datasize==2) da->warnings|=DAW_STACK; break; + case D_INT: + da->warnings|=DAW_INTERRUPT; break; + case D_IO: + da->warnings|=DAW_IO; break; + case D_PRIVILEGED: + da->warnings|=DAW_PRIV; + break; }; + // Warn on system, privileged and undocumented commands. + if ((cmdtype & D_USEMASK)!=0) { + if ((cmdtype & D_USEMASK)==D_RARE || (cmdtype & D_USEMASK)==D_SUSPICIOUS) + da->warnings|=DAW_RARE; + if ((cmdtype & D_USEMASK)==D_UNDOC) da->warnings|=DAW_NONCLASS; }; + // If command implicitly changes ESP, it uses and modifies this register. + if (cmdtype & D_CHGESP) { + da->uses|=(1<modifies|=(1<errors & DAE_CROSS) // Incomplete command + Thexdump(da->dump,cmd,cmdsize,config->lowercase); + else { + j=0; + // Dump prefixes. REPxx is treated as prefix and separated from command + // with semicolon; prefixes 66, F2 and F3 that are part of SSE command + // are glued with command's body - well, at least if there are no other + // prefixes inbetween. + for (u=0; unprefix; u++) { + j+=Thexdump(da->dump+j,cmd+u,1,config->lowercase); + if (cmd[u]==0x66 && (cmdtype & D_MUSTMASK)==D_MUST66) continue; + if (cmd[u]==0xF2 && ((cmdtype & D_MUSTMASK)==D_MUSTF2 || + (cmdtype & D_MUSTMASK)==D_NEEDF2)) continue; + if (cmd[u]==0xF3 && ((cmdtype & D_MUSTMASK)==D_MUSTF3 || + (cmdtype & D_MUSTMASK)==D_NEEDF3)) continue; + if ((im.prefixlist & (PF_VEX2|PF_VEX3))!=0 && u==da->nprefix-2) + continue; + if ((im.prefixlist & PF_VEX3)!=0 && u==da->nprefix-3) + continue; + da->dump[j++]=T(':'); }; + // Dump body of the command, including ModRegRM and SIB bytes. + j+=Thexdump(da->dump+j,cmd+u,im.mainsize+im.modsize-u, + config->lowercase); + // Dump displacement, if any, separated with space from command's body. + if (im.dispsize>0) { + da->dump[j++]=T(' '); + j+=Thexdump(da->dump+j,cmd+im.mainsize+im.modsize,im.dispsize, + config->lowercase); + ; + }; + // Dump immediate constants, if any. + if (im.immsize1>0) { + da->dump[j++]=T(' '); + j+=Thexdump(da->dump+j,cmd+im.mainsize+im.modsize+im.dispsize, + im.immsize1,config->lowercase) + ; + }; + if (im.immsize2>0) { + da->dump[j++]=T(' '); + Thexdump(da->dump+j,cmd+im.mainsize+im.modsize+im.dispsize+im.immsize1, + im.immsize2,config->lowercase); + ; + }; + }; + }; + // Prepare disassembled command. There are many options that control look + // and feel of disassembly, so the procedure is a bit, errr, boring. + if (damode & DA_TEXT) { + if (da->errors & DAE_CROSS) { // Incomplete command + q=Tstrcopy(da->result,TEXTLEN,T("???")); + if (damode & DA_HILITE) { + memset(da->mask,DRAW_SUSPECT,q); + da->masksize=q; + }; } + else { + j=0; + // If LOCK and/or REPxx prefix is present, prepend it to the command. + // Such cases are rare, first comparison makes small optimization. + if (im.prefixlist & (PF_LOCK|PF_REPMASK)) { + if (im.prefixlist & PF_LOCK) + j=Tcopycase(da->result,TEXTLEN,T("LOCK "),config->lowercase); + if (im.prefixlist & PF_REPNE) + j+=Tcopycase(da->result+j,TEXTLEN-j,T("REPNE "),config->lowercase); + else if (im.prefixlist & PF_REP) { + if ((cmdtype & D_MUSTMASK)==D_MUSTREPE) + j+=Tcopycase(da->result+j,TEXTLEN-j,T("REPE "),config->lowercase); + else + j+=Tcopycase(da->result+j,TEXTLEN-j,T("REP "),config->lowercase); + ; + }; + }; + // If there is a branch hint, prefix jump mnemonics with '+' (taken) or + // '-' (not taken), or use pseudoprefixes BHT/BHNT. I don't know how MASM + // indicates hints. + if (cmdtype & D_BHINT) { + if (config->jumphintmode==0) { + if (im.prefixlist & PF_TAKEN) + da->result[j++]=T('+'); + else if (im.prefixlist & PF_NOTTAKEN) + da->result[j++]=T('-'); + ; } + else { + if (im.prefixlist & PF_TAKEN) + j+=Tcopycase(da->result+j,TEXTLEN-j,T("BHT "),config->lowercase); + else if (im.prefixlist & PF_NOTTAKEN) + j+=Tcopycase(da->result+j,TEXTLEN-j,T("BHNT "),config->lowercase); + ; + }; + }; + // Get command mnemonics. If mnemonics contains asterisk, it must be + // replaced by W, D or none according to sizesens. Asterisk in SSE and + // AVX commands means comparison predicate. + if (cmdtype & D_WILDCARD) { + for (i=0; ; i++) { + if (pcmd->name[i]==T('\0')) + break; + else if (pcmd->name[i]!=T('*')) + da->result[j++]=pcmd->name[i]; + else if (cmdtype & D_POSTBYTE) + j+=Tstrcopy(da->result+j,TEXTLEN-j, + ssepredicate[cmd[im.mainsize+im.modsize+im.dispsize]]); + else if (datasize==4 && + (config->sizesens==0 || config->sizesens==1)) + da->result[j++]=T('D'); + else if (datasize==2 && + (config->sizesens==1 || config->sizesens==2)) + da->result[j++]=T('W'); + ; }; + da->result[j]=T('\0'); + if (config->lowercase) tstrlwr(da->result); } + else { + j+=Tcopycase(da->result+j,TEXTLEN-j,pcmd->name,config->lowercase); + if (config->disasmmode==DAMODE_ATT && im.usesdatasize!=0) { + // AT&T mnemonics are suffixed with the operand's size. + if ((cmdtype & D_CMDTYPE)!=D_CMD && + (cmdtype & D_CMDTYPE)!=D_MOV && + (cmdtype & D_CMDTYPE)!=D_MOVC && + (cmdtype & D_CMDTYPE)!=D_TEST && + (cmdtype & D_CMDTYPE)!=D_STRING && + (cmdtype & D_CMDTYPE)!=D_PUSH && + (cmdtype & D_CMDTYPE)!=D_POP) ; + else if (datasize==1) j+=Tcopycase(da->result+j,TEXTLEN-j, + T("B"),config->lowercase); + else if (datasize==2) j+=Tcopycase(da->result+j,TEXTLEN-j, + T("W"),config->lowercase); + else if (datasize==4) j+=Tcopycase(da->result+j,TEXTLEN-j, + T("L"),config->lowercase); + else if (datasize==8) j+=Tcopycase(da->result+j,TEXTLEN-j, + T("Q"),config->lowercase); + ; + }; + }; + if (damode & DA_HILITE) { + type=cmdtype & D_CMDTYPE; + if (da->errors!=0) + cfill=DRAW_SUSPECT; + else switch (cmdtype & D_CMDTYPE) { + case D_JMP: // Unconditional near jump + case D_JMPFAR: // Unconditional far jump + cfill=DRAW_JUMP; break; + case D_JMC: // Conditional jump on flags + case D_JMCX: // Conditional jump on (E)CX (and flags) + cfill=DRAW_CJMP; break; + case D_PUSH: // PUSH exactly 1 (d)word of data + case D_POP: // POP exactly 1 (d)word of data + cfill=DRAW_PUSHPOP; break; + case D_CALL: // Plain near call + case D_CALLFAR: // Far call + case D_INT: // Interrupt + cfill=DRAW_CALL; break; + case D_RET: // Plain near return from call + case D_RETFAR: // Far return or IRET + cfill=DRAW_RET; break; + case D_FPU: // FPU command + case D_MMX: // MMX instruction, incl. SSE extensions + case D_3DNOW: // 3DNow! instruction + case D_SSE: // SSE instruction + case D_AVX: // AVX instruction + cfill=DRAW_FPU; break; + case D_IO: // Accesses I/O ports + case D_SYS: // Legal but useful in system code only + case D_PRIVILEGED: // Privileged (non-Ring3) command + cfill=DRAW_SUSPECT; break; + default: + cfill=DRAW_PLAIN; + break; }; + memset(da->mask,cfill,j); + da->masksize=j; + }; + // Add decoded operands. In HLA mode, order of operands is inverted + // except for comparison commands (marked with bit D_HLADIR) and + // arguments are enclosed in parenthesis (except for immediate jumps). + // In AT&T mode, order of operands is always inverted. Operands of type + // B_PSEUDO are implicit and don't appear in text. + if (config->disasmmode==DAMODE_HLA && + (pcmd->arg[0] & B_ARGMASK)!=B_OFFSET && + (pcmd->arg[0] & B_ARGMASK)!=B_BYTEOFFS && + (pcmd->arg[0] & B_ARGMASK)!=B_FARCONST) + enclose=1; // Enclose operand list in parenthesis + else + enclose=0; + if ((damode & DA_HILITE)!=0 && config->hiliteoperands!=0) + cfill=DRAW_PLAIN; + nout=0; + for (i=0; idisasmmode==DAMODE_HLA && (cmdtype & D_HLADIR)==0) || + config->disasmmode==DAMODE_ATT) + k=noperand-1-i; // Inverted (HLA/AT&T) order of operands + else + k=i; // Direct (Intel's) order of operands + arg=da->op[k].arg; + if ((arg & B_ARGMASK)==B_NONE || (arg & B_PSEUDO)!=0) + continue; // Empty or implicit operand + q=j; + if (nout==0) { + // Spaces between mnemonic and first operand. + da->result[j++]=T(' '); + if (config->tabarguments) { + for ( ; j<8; j++) da->result[j]=T(' '); }; + if (enclose) { + da->result[j++]=T('('); + if (config->extraspace) da->result[j++]=(' '); + }; } + else { + // Comma and optional space between operands. + da->result[j++]=T(','); + if (config->extraspace) da->result[j++]=T(' '); + }; + if (damode & DA_HILITE) { + memset(da->mask+q,cfill,j-q); + da->masksize=j; }; + // Operand itself. + q=j; + op=da->op+k; + j+=Tstrcopy(da->result+j,TEXTLEN-j-10,op->text); + if (damode & DA_HILITE) { + if (config->hiliteoperands==0) + ofill=cfill; + else if (op->features & OP_REGISTER) + ofill=DRAW_IREG; + else if (op->features & (OP_FPUREG|OP_MMXREG|OP_3DNOWREG|OP_SSEREG)) + ofill=DRAW_FREG; + else if (op->features & (OP_SEGREG|OP_CREG|OP_DREG)) + ofill=DRAW_SYSREG; + else if (op->features & OP_MEMORY) { + if (op->scale[REG_ESP]!=0 || op->scale[REG_EBP]!=0) + ofill=DRAW_STKMEM; + else + ofill=DRAW_MEM; + ; } + else if (op->features & OP_CONST) + ofill=DRAW_CONST; + else + ofill=cfill; + memset(da->mask+q,ofill,j-q); + da->masksize=j; + }; + nout++; + }; + // All arguments added, close list. + if (enclose && nout!=0) { + q=j; + if (config->extraspace) da->result[j++]=T(' '); + da->result[j++]=T(')'); + if (damode & DA_HILITE) { + memset(da->mask+q,cfill,j-q); + da->masksize=j; + }; + }; + da->result[j]=T('\0'); + }; + }; + // Calculate total size of command. + if (da->errors & DAE_CROSS) // Incomplete command + n=cmdsize; + else + n+=im.modsize+im.dispsize+im.immsize1+im.immsize2; + da->size=n; + return n; +}; + +// Given error and warning lists, returns pointer to the string describing +// relatively most severe error or warning, or NULL if there are no errors or +// warnings. +tchar *Geterrwarnmessage(ulong errors,ulong warnings) { + tchar *ps; + if (errors==0 && warnings==0) + ps=NULL; + else if (errors & DAE_BADCMD) + ps=T("Unknown command"); + else if (errors & DAE_CROSS) + ps=T("Command crosses end of memory block"); + else if (errors & DAE_MEMORY) + ps=T("Illegal use of register"); + else if (errors & DAE_REGISTER) + ps=T("Memory address is not allowed"); + else if (errors & DAE_LOCK) + ps=T("LOCK prefix is not allowed"); + else if (errors & DAE_BADSEG) + ps=T("Invalid segment register"); + else if (errors & DAE_SAMEPREF) + ps=T("Two prefixes from the same group"); + else if (errors & DAE_MANYPREF) + ps=T("More than 4 prefixes"); + else if (errors & DAE_BADCR) + ps=T("Invalid CR register"); + else if (errors & DAE_INTERN) + ps=T("Internal OllyDbg error"); + else if (warnings & DAW_DATASIZE) + ps=T("Superfluous operand size prefix"); + else if (warnings & DAW_ADDRSIZE) + ps=T("Superfluous address size prefix"); + else if (warnings & DAW_SEGPREFIX) + ps=T("Superfluous segment override prefix"); + else if (warnings & DAW_REPPREFIX) + ps=T("Superfluous REPxx prefix"); + else if (warnings & DAW_DEFSEG) + ps=T("Explicit default segment register"); + else if (warnings & DAW_JMP16) + ps=T("16-bit jump, call or return"); + else if (warnings & DAW_FARADDR) + ps=T("Far jump or call"); + else if (warnings & DAW_SEGMOD) + ps=T("Modification of segment register"); + else if (warnings & DAW_PRIV) + ps=T("Privileged instruction"); + else if (warnings & DAW_IO) + ps=T("I/O command"); + else if (warnings & DAW_SHIFT) + ps=T("Shift out of range"); + else if (warnings & DAW_LOCK) + ps=T("Command uses (valid) LOCK prefix"); + else if (warnings & DAW_STACK) + ps=T("Unaligned stack operation"); + else if (warnings & DAW_NOESP) + ps=T("Suspicious use of stack pointer"); + else if (warnings & DAW_NONCLASS) + ps=T("Undocumented instruction or encoding"); + else + ps=NULL; + return ps; +}; + diff --git a/Disasm201/cmdlist.c b/Disasm201/cmdlist.c new file mode 100644 index 0000000..4e42f75 --- /dev/null +++ b/Disasm201/cmdlist.c @@ -0,0 +1,11221 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// OllyDbg Disassembling Engine v2.01 // +// // +// Copyright (c) 2007-2013 Oleh Yuschuk, ollydbg@t-online.de // +// // +// This code is part of the OllyDbg Disassembler v2.01 // +// // +// Disassembling engine is free software; you can redistribute it and/or // +// modify it under the terms of the GNU General Public License as published // +// by the Free Software Foundation; either version 3 of the License, or (at // +// your option) any later version. // +// // +// This code is distributed in the hope that it will be useful, but WITHOUT // +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or // +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for // +// more details. // +// // +// You should have received a copy of the GNU General Public License along // +// with this program. If not, see . // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +// // +// This is a fast disassembler that can be used to determine the length of // +// the binary 80x86 32-bit command and its attributes, to convert it to the // +// human-readable text form, highlight its operands, and create hexadecimal // +// dump of the binary command. // +// // +// It is a stripped down version of the disassembler used by OllyDbg 2.01. // +// It can't analyse and comment the contents of the operands, or predict the // +// results of the command execution. Analysis-dependent features are not // +// included, too. Most other features are kept. // +// // +// Disassembler supports integer, FPU, MMX, 3DNow, SSE1-SSE4.1 and AVX // +// instructions. 64-bit mode, AVX2, FMA and XOP are not (yet) supported. // +// // +// This code can be compiled either in ASCII or UNICODE mode. It is reentrant // +// (thread-safe, feature not available in the original OllyDbg code). // +// // +// Typical operation speed on 3-GHz Phenom II in MASM mode is: // +// // +// Command length and info: 130 ns/command (7,700,000 commands/s) // +// Disassembly: 290 ns/command (3,400,000 commands/s) // +// Disassembly, dump, highlighting: 350 ns/command (2,800,000 commands/s) // +// // +//////////////////////////////////////////////////////////////////////////////// + + +#include +#pragma hdrstop + +#include "disasm.h" + +const t_bincmd bincmd[] = { + + { T("PAUSE"), + D_SSE|D_MUSTF3, 0, + 1, 0x000000FF, 0x00000090, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD, DX_NOP, + 1, 0x000000FF, 0x00000090, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x0000190F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x00001A0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x00001B0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x00001C0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x00001D0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD|D_UNDOC, DX_NOP, + 2, 0x0000FFFF, 0x00001E0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_CMD, DX_NOP, + 2, 0x0000FFFF, 0x00001F0F, 0x00, + B_INT, + B_NONE, + B_NONE, + B_NONE }, + + { T("MONITOR"), + D_SYS|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C8010F, 0x00, + B_EAXMEM|B_PSEUDO, + B_ECX|B_BINARY|B_PSEUDO, + B_EDX|B_BINARY|B_PSEUDO, + B_NONE }, + + { T("MWAIT"), + D_SYS|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C9010F, 0x00, + B_EAX|B_BINARY|B_PSEUDO, + B_ECX|B_BINARY|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CLAC"), + D_SYS|D_RARE, 0, + 3, 0x00FFFFFF, 0x00CA010F, 0x00, + B_EAX|B_BINARY|B_PSEUDO, + B_ECX|B_BINARY|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STAC"), + D_SYS|D_RARE, 0, + 3, 0x00FFFFFF, 0x00CB010F, 0x00, + B_EAX|B_BINARY|B_PSEUDO, + B_ECX|B_BINARY|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("AAA"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 1, 0x000000FF, 0x00000037, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("AAD"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 2, 0x0000FFFF, 0x00000AD5, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("AAD"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 1, 0x000000FF, 0x000000D5, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_CONST8|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("AAM"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 2, 0x0000FFFF, 0x00000AD4, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("AAM"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 1, 0x000000FF, 0x000000D4, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_CONST8|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("AAS"), + D_CMD|D_ALLFLAGS|D_RARE, 0, + 1, 0x000000FF, 0x0000003F, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("ADC"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x00000014, 0x00, + B_ACC|B_UPD, + B_CONST|B_NOADDR, + B_NONE, + B_NONE }, + + { T("ADC"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00001080, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_CONST|B_NOADDR, + B_NONE, + B_NONE }, + + { T("ADC"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00001082, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_SXTCONST, + B_NONE, + B_NONE }, + + { T("ADC"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x00000010, 0x00, + B_INT|B_UPD, + B_REG, + B_NONE, + B_NONE }, + + { T("ADC"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x00000012, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("ADD"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB|DX_ADD, + 1, 0x000000FE, 0x00000004, 0x00, + B_ACC|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("ADD"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_ADD, + 1, 0x000038FE, 0x00000080, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("ADD"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_ADD, + 1, 0x000038FE, 0x00000082, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_SXTCONST, + B_NONE, + B_NONE }, + + { T("ADD"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_ADD, + 1, 0x000000FE, 0x00000000, 0x00, + B_INT|B_UPD, + B_REG, + B_NONE, + B_NONE }, + + { T("ADD"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB|DX_ADD, + 1, 0x000000FE, 0x00000002, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("AND"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000024, 0x00, + B_ACC|B_BINARY|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("AND"), + D_TEST|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000038FE, 0x00002080, 0x00, + B_INT|B_BINARY|B_SHOWSIZE|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("AND"), + D_TEST|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000038FE, 0x00002082, 0x00, + B_INT|B_BINARY|B_SHOWSIZE|B_UPD, + B_SXTCONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("AND"), + D_TEST|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000020, 0x00, + B_INT|B_BINARY|B_UPD, + B_REG|B_BINARY, + B_NONE, + B_NONE }, + + { T("AND"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000022, 0x00, + B_REG|B_BINARY|B_UPD, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("ARPL"), + D_SYS|D_FLAGZ|D_RARE, 0, + 1, 0x000000FF, 0x00000063, 0x00, + B_INT16|B_UPD, + B_REG16, + B_NONE, + B_NONE }, + + { T("BOUND"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x00000062, 0x00, + B_REG|B_SIGNED, + B_INTPAIR|B_MEMONLY, + B_NONE, + B_NONE }, + + { T("BSF"), + D_CMD|D_ALLFLAGS, DX_JZ, + 2, 0x0000FFFF, 0x0000BC0F, 0x00, + B_REG|B_CHG, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("BSR"), + D_CMD|D_NOREP|D_ALLFLAGS, DX_JZ, + 2, 0x0000FFFF, 0x0000BD0F, 0x00, + B_REG|B_CHG, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("BSWAP"), + D_CMD, 0, + 2, 0x0000F8FF, 0x0000C80F, 0x00, + B_REGCMD|B_32BITONLY|B_NOESP|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("BT"), + D_TEST|D_ALLFLAGS, DX_JC, + 2, 0x0000FFFF, 0x0000A30F, 0x00, + B_INT|B_BINARY, + B_REG|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BT"), + D_TEST|D_ALLFLAGS, DX_JC, + 2, 0x0038FFFF, 0x0020BA0F, 0x00, + B_INT|B_BINARY|B_SHOWSIZE, + B_CONST8|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTC"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0000FFFF, 0x0000BB0F, 0x00, + B_INT|B_BINARY|B_NOESP|B_UPD, + B_REG|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTC"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0038FFFF, 0x0038BA0F, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTR"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0000FFFF, 0x0000B30F, 0x00, + B_INT|B_BINARY|B_NOESP|B_UPD, + B_REG|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTR"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0038FFFF, 0x0030BA0F, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTS"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0000FFFF, 0x0000AB0F, 0x00, + B_INT|B_BINARY|B_NOESP|B_UPD, + B_REG|B_BITCNT, + B_NONE, + B_NONE }, + + { T("BTS"), + D_CMD|D_LOCKABLE|D_ALLFLAGS, DX_JC, + 2, 0x0038FFFF, 0x0028BA0F, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_BITCNT, + B_NONE, + B_NONE }, + + { T("CALL"), + D_CALL|D_CHGESP, 0, + 1, 0x000000FF, 0x000000E8, 0x00, + B_OFFSET|B_JMPCALL, + B_PUSHRET|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CALL"), + D_CALL|D_CHGESP, 0, + 1, 0x000038FF, 0x000010FF, 0x00, + B_INT|B_JMPCALL, + B_PUSHRET|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CALL"), + D_CALLFAR|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x0000009A, 0x00, + B_FARCONST|B_JMPCALLFAR, + B_PUSHRETF|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CALL"), + D_CALLFAR|D_CHGESP|D_RARE, 0, + 1, 0x000038FF, 0x000018FF, 0x00, + B_SEGOFFS|B_JMPCALLFAR|B_MEMONLY, + B_PUSHRETF|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CBW"), + D_CMD|D_DATA16, 0, + 1, 0x000000FF, 0x00000098, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_AL|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CBW"), + D_CMD|D_DATA16, 0, + 1, 0x000000FF, 0x00000098, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_AL, + B_NONE, + B_NONE }, + + { T("CDQ"), + D_CMD|D_DATA32, 0, + 1, 0x000000FF, 0x00000099, 0x00, + B_EDX|B_CHG|B_PSEUDO, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CDQ"), + D_CMD|D_DATA32, 0, + 1, 0x000000FF, 0x00000099, 0x00, + B_EDX|B_CHG|B_PSEUDO, + B_EAX, + B_NONE, + B_NONE }, + + { T("CLC"), + D_CMD|D_FLAGC, 0, + 1, 0x000000FF, 0x000000F8, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CLD"), + D_CMD|D_FLAGD, 0, + 1, 0x000000FF, 0x000000FC, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CLFLUSH"), + D_CMD|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0038AE0F, 0x00, + B_ANYMEM|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("CLI"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x000000FA, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CLTS"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000060F, 0x00, + B_CR0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("CMC"), + D_CMD|D_FLAGC, 0, + 1, 0x000000FF, 0x000000F5, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CMOVO"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x0000400F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNO"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x0000410F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVB"), + D_MOVC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000420F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVC"), + D_MOVC|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000420F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNAE"), + D_MOVC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000420F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVAE"), + D_MOVC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000430F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNB"), + D_MOVC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000430F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNC"), + D_MOVC|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000430F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVE"), + D_MOVC|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000440F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVZ"), + D_MOVC|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000440F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNE"), + D_MOVC|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000450F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNZ"), + D_MOVC|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000450F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVBE"), + D_MOVC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000460F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNA"), + D_MOVC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000460F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVA"), + D_MOVC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000470F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNBE"), + D_MOVC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000470F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVS"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x0000480F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNS"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x0000490F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVPE"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004A0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVP"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004A0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVPO"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004B0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNP"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004B0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVL"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004C0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNGE"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004C0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVGE"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004D0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNL"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004D0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVLE"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004E0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNG"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004E0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVG"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004F0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMOVNLE"), + D_MOVC|D_COND, 0, + 2, 0x0000FFFF, 0x00004F0F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("CMP"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000000FE, 0x0000003C, 0x00, + B_ACC, + B_CONST, + B_NONE, + B_NONE }, + + { T("CMP"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000038FE, 0x00003880, 0x00, + B_INT|B_SHOWSIZE, + B_CONST, + B_NONE, + B_NONE }, + + { T("CMP"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000038FE, 0x00003882, 0x00, + B_INT|B_SHOWSIZE, + B_SXTCONST, + B_NONE, + B_NONE }, + + { T("CMP"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000000FE, 0x00000038, 0x00, + B_INT, + B_REG, + B_NONE, + B_NONE }, + + { T("CMP"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000000FE, 0x0000003A, 0x00, + B_REG, + B_INT, + B_NONE, + B_NONE }, + + { T("CMPXCHG"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 2, 0x0000FEFF, 0x0000B00F, 0x00, + B_INT|B_UPD, + B_REG, + B_ACC|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPXCHG8B"), + D_CMD|D_LOCKABLE|D_MEMORY|D_ALLFLAGS, DX_JE|DX_JB, + 2, 0x0038FFFF, 0x0008C70F, 0x00, + B_INT64|B_MEMONLY|B_UPD, + B_EAX|B_UPD|B_PSEUDO, + B_EDX|B_UPD|B_PSEUDO, + B_EBX|B_PSEUDO }, + + { T("CPUID"), + D_CMD, 0, + 2, 0x0000FFFF, 0x0000A20F, 0x00, + B_EAX|B_CHG|B_PSEUDO, + B_EBX|B_CHG|B_PSEUDO, + B_ECX|B_CHG|B_PSEUDO, + B_EDX|B_CHG|B_PSEUDO }, + + { T("CWD"), + D_CMD|D_DATA16, 0, + 1, 0x000000FF, 0x00000099, 0x00, + B_DX|B_CHG|B_PSEUDO, + B_AX|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CWD"), + D_CMD|D_DATA16, 0, + 1, 0x000000FF, 0x00000099, 0x00, + B_DX|B_CHG|B_PSEUDO, + B_AX, + B_NONE, + B_NONE }, + + { T("CWDE"), + D_CMD|D_DATA32, 0, + 1, 0x000000FF, 0x00000098, 0x00, + B_EAX|B_UPD|B_PSEUDO, + B_AX|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CWDE"), + D_CMD|D_DATA32, 0, + 1, 0x000000FF, 0x00000098, 0x00, + B_EAX|B_UPD|B_PSEUDO, + B_AX, + B_NONE, + B_NONE }, + + { T("DAA"), + D_CMD|D_ALLFLAGS|D_USESCARRY|D_RARE, DX_JC, + 1, 0x000000FF, 0x00000027, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("DAS"), + D_CMD|D_ALLFLAGS|D_USESCARRY|D_RARE, DX_JC, + 1, 0x000000FF, 0x0000002F, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("DEC"), + D_CMD|D_SIZE01|D_LOCKABLE|D_NOCFLAG, DX_JZ, + 1, 0x000038FE, 0x000008FE, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("DEC"), + D_CMD|D_NOCFLAG, DX_JZ, + 1, 0x000000F8, 0x00000048, 0x00, + B_REGCMD|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("DIV"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000030F6, 0x00, + B_INT8|B_SHOWSIZE, + B_AX|B_UPD|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("DIV"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000030F7, 0x00, + B_INT1632|B_UNSIGNED|B_NOESP|B_SHOWSIZE, + B_DXEDX|B_UPD|B_PSEUDO, + B_ACC|B_UPD|B_PSEUDO, + B_NONE }, + + { T("EMMS"), + D_CMD, 0, + 2, 0x0000FFFF, 0x0000770F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("ENTER"), + D_CMD|D_CHGESP, 0, + 1, 0x000000FF, 0x000000C8, 0x00, + B_CONST16|B_STACKINC, + B_CONST8_2|B_UNSIGNED, + B_PUSH|B_CHG|B_PSEUDO, + B_BPEBP|B_CHG|B_PSEUDO }, + + { T("WAIT"), + D_CMD, 0, + 1, 0x000000FF, 0x0000009B, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FWAIT"), + D_CMD, 0, + 1, 0x000000FF, 0x0000009B, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("HLT"), + D_PRIVILEGED|D_RARE, 0, + 1, 0x000000FF, 0x000000F4, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("IDIV"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000038F6, 0x00, + B_INT8|B_SIGNED|B_SHOWSIZE, + B_AX|B_UPD|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("IDIV"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000038F7, 0x00, + B_INT1632|B_SIGNED|B_NOESP|B_SHOWSIZE, + B_DXEDX|B_UPD|B_PSEUDO, + B_ACC|B_UPD|B_PSEUDO, + B_NONE }, + + { T("IMUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000028F6, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_INT8|B_SIGNED|B_SHOWSIZE, + B_AL|B_SIGNED|B_PSEUDO, + B_NONE }, + + { T("IMUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000028F7, 0x00, + B_DXEDX|B_CHG|B_PSEUDO, + B_ACC|B_UPD|B_PSEUDO, + B_INT1632|B_SIGNED|B_NOESP|B_SHOWSIZE, + B_NONE }, + + { T("IMUL"), + D_CMD|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x0000AF0F, 0x00, + B_REG|B_UPD, + B_INT|B_NOESP, + B_NONE, + B_NONE }, + + { T("IMUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x0000006B, 0x00, + B_REG|B_CHG, + B_INT|B_NOESP, + B_SXTCONST, + B_NONE }, + + { T("IMUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x00000069, 0x00, + B_REG|B_CHG, + B_INT|B_NOESP, + B_CONST|B_SIGNED, + B_NONE }, + + { T("IN"), + D_IO|D_SIZE01|D_RARE, 0, + 1, 0x000000FE, 0x000000E4, 0x00, + B_ACC|B_CHG, + B_CONST8|B_PORT, + B_NONE, + B_NONE }, + + { T("IN"), + D_IO|D_SIZE01|D_RARE, 0, + 1, 0x000000FE, 0x000000EC, 0x00, + B_ACC|B_CHG, + B_DXPORT|B_PORT, + B_NONE, + B_NONE }, + + { T("INC"), + D_CMD|D_SIZE01|D_LOCKABLE|D_NOCFLAG, DX_JZ, + 1, 0x000038FE, 0x000000FE, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("INC"), + D_CMD|D_NOCFLAG, DX_JZ, + 1, 0x000000F8, 0x00000040, 0x00, + B_REGCMD|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("INT"), + D_INT, 0, + 1, 0x000000FF, 0x000000CD, 0x00, + B_CONST8, + B_NONE, + B_NONE, + B_NONE }, + + { T("INT3"), + D_INT|D_RARE, 0, + 1, 0x000000FF, 0x000000CC, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("INTO"), + D_INT|D_RARE, 0, + 1, 0x000000FF, 0x000000CE, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("INT1"), + D_INT|D_UNDOC, 0, + 1, 0x000000FF, 0x000000F1, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("ICEBP"), + D_INT|D_UNDOC, 0, + 1, 0x000000FF, 0x000000F1, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("INVD"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000080F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("INVLPG"), + D_PRIVILEGED|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0038010F, 0x00, + B_ANYMEM|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("IRET*"), + D_RETFAR|D_ALLFLAGS|D_CHGESP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x000000CF, 0x00, + B_STKTOPFAR|B_JMPCALLFAR|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("JO"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x00000070, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JO"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x0000800F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNO"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x00000071, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNO"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x0000810F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JB"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 1, 0x000000FF, 0x00000072, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JC"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JC, + 1, 0x000000FF, 0x00000072, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNAE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 1, 0x000000FF, 0x00000072, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JB"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000820F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JC"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000820F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNAE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000820F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JAE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 1, 0x000000FF, 0x00000073, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNB"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 1, 0x000000FF, 0x00000073, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNC"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JC, + 1, 0x000000FF, 0x00000073, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JAE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000830F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNB"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000830F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNC"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000830F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JE"), + D_JMC|D_BHINT|D_COND, DX_JE, + 1, 0x000000FF, 0x00000074, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JZ"), + D_JMC|D_BHINT|D_COND, DX_JZ, + 1, 0x000000FF, 0x00000074, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JE"), + D_JMC|D_BHINT|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000840F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JZ"), + D_JMC|D_BHINT|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000840F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNE"), + D_JMC|D_BHINT|D_COND, DX_JE, + 1, 0x000000FF, 0x00000075, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNZ"), + D_JMC|D_BHINT|D_COND, DX_JZ, + 1, 0x000000FF, 0x00000075, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNE"), + D_JMC|D_BHINT|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000850F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNZ"), + D_JMC|D_BHINT|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000850F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JBE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 1, 0x000000FF, 0x00000076, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNA"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 1, 0x000000FF, 0x00000076, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JBE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000860F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNA"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000860F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JA"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 1, 0x000000FF, 0x00000077, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNBE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 1, 0x000000FF, 0x00000077, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JA"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000870F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNBE"), + D_JMC|D_BHINT|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000870F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JS"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x00000078, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JS"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x0000880F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNS"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x00000079, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNS"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x0000890F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JPE"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 1, 0x000000FF, 0x0000007A, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JP"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 1, 0x000000FF, 0x0000007A, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JPE"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00008A0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JP"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00008A0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JPO"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 1, 0x000000FF, 0x0000007B, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNP"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 1, 0x000000FF, 0x0000007B, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JPO"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00008B0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNP"), + D_JMC|D_BHINT|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00008B0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JL"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007C, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNGE"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007C, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JL"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008C0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNGE"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008C0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JGE"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007D, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNL"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007D, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JGE"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008D0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNL"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008D0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JLE"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007E, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNG"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007E, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JLE"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008E0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNG"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008E0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JG"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007F, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNLE"), + D_JMC|D_BHINT|D_COND, 0, + 1, 0x000000FF, 0x0000007F, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JG"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008F0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JNLE"), + D_JMC|D_BHINT|D_COND, 0, + 2, 0x0000FFFF, 0x00008F0F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JCXZ"), + D_JMCX|D_ADDR16|D_BHINT, 0, + 1, 0x000000FF, 0x000000E3, 0x00, + B_CX|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("JECXZ"), + D_JMCX|D_ADDR32|D_BHINT, 0, + 1, 0x000000FF, 0x000000E3, 0x00, + B_ECX|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("JMP"), + D_JMP, 0, + 1, 0x000000FF, 0x000000EB, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JMP"), + D_JMP, 0, + 1, 0x000000FF, 0x000000E9, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JMP"), + D_JMP, 0, + 1, 0x000038FF, 0x000020FF, 0x00, + B_INT|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JMP"), + D_JMPFAR|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000EA, 0x00, + B_FARCONST|B_JMPCALLFAR, + B_NONE, + B_NONE, + B_NONE }, + + { T("JMP"), + D_JMPFAR|D_RARE, 0, + 1, 0x000038FF, 0x000028FF, 0x00, + B_SEGOFFS|B_JMPCALLFAR|B_MEMONLY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("LAHF"), + D_CMD, 0, + 1, 0x000000FF, 0x0000009F, 0x00, + B_AH|B_CHG|B_PSEUDO, + B_FLAGS8|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("LAR"), + D_CMD|D_FLAGZ|D_RARE, DX_JZ, + 2, 0x0000FFFF, 0x0000020F, 0x00, + B_REG|B_BINARY|B_NOESP|B_CHG, + B_INT|B_BINARY|B_NOESP, + B_NONE, + B_NONE }, + + { T("LDS"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x000000C5, 0x00, + B_SEGDS|B_CHG|B_PSEUDO, + B_REG|B_BINARY|B_CHG, + B_SEGOFFS|B_MEMONLY, + B_NONE }, + + { T("LES"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x000000C4, 0x00, + B_SEGES|B_CHG|B_PSEUDO, + B_REG|B_BINARY|B_CHG, + B_SEGOFFS|B_MEMONLY, + B_NONE }, + + { T("LFS"), + D_CMD|D_RARE, 0, + 2, 0x0000FFFF, 0x0000B40F, 0x00, + B_SEGFS|B_CHG|B_PSEUDO, + B_REG|B_BINARY|B_CHG, + B_SEGOFFS|B_MEMONLY, + B_NONE }, + + { T("LGS"), + D_CMD|D_RARE, 0, + 2, 0x0000FFFF, 0x0000B50F, 0x00, + B_SEGGS|B_CHG|B_PSEUDO, + B_REG|B_BINARY|B_CHG, + B_SEGOFFS|B_MEMONLY, + B_NONE }, + + { T("LSS"), + D_CMD|D_RARE, 0, + 2, 0x0000FFFF, 0x0000B20F, 0x00, + B_SEGSS|B_CHG|B_PSEUDO, + B_REG|B_BINARY|B_CHG, + B_SEGOFFS|B_MEMONLY, + B_NONE }, + + { T("LEA"), + D_CMD|D_HLADIR, DX_LEA, + 1, 0x000000FF, 0x0000008D, 0x00, + B_REG|B_BINARY|B_CHG, + B_ANYMEM|B_MEMONLY|B_NOSEG, + B_NONE, + B_NONE }, + + { T("LEAVE"), + D_CMD|D_CHGESP, 0, + 1, 0x000000FF, 0x000000C9, 0x00, + B_BPEBP|B_CHG|B_PSEUDO, + B_EBPMEM|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("LGDT"), + D_PRIVILEGED|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0010010F, 0x00, + B_DESCR|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("LIDT"), + D_PRIVILEGED|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0018010F, 0x00, + B_DESCR|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("LLDT"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0038FFFF, 0x0010000F, 0x00, + B_INT16|B_NOESP, + B_NONE, + B_NONE, + B_NONE }, + + { T("LMSW"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0038FFFF, 0x0030010F, 0x00, + B_CR0|B_UPD|B_PSEUDO, + B_INT16|B_NOESP, + B_NONE, + B_NONE }, + + { T("LOOP"), + D_JMCX|D_ADDR32, 0, + 1, 0x000000FF, 0x000000E2, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPD"), + D_JMCX|D_ADDR32, 0, + 1, 0x000000FF, 0x000000E2, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPW"), + D_JMCX|D_ADDR16, 0, + 1, 0x000000FF, 0x000000E2, 0x00, + B_CX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPZ"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPDZ"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPWZ"), + D_JMCX|D_ADDR16|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_CX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPE"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPDE"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPWE"), + D_JMCX|D_ADDR16|D_COND, 0, + 1, 0x000000FF, 0x000000E1, 0x00, + B_CX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPNZ"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPDNZ"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPWNZ"), + D_JMCX|D_ADDR16|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_CX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPNE"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPDNE"), + D_JMCX|D_ADDR32|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_ECX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LOOPWNE"), + D_JMCX|D_ADDR16|D_COND, 0, + 1, 0x000000FF, 0x000000E0, 0x00, + B_CX|B_UPD|B_PSEUDO, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE }, + + { T("LSL"), + D_SYS|D_FLAGZ|D_RARE, 0, + 2, 0x0000FFFF, 0x0000030F, 0x00, + B_REG|B_NOESP|B_CHG, + B_INT|B_BINARY|B_NOESP, + B_NONE, + B_NONE }, + + { T("LTR"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0038FFFF, 0x0018000F, 0x00, + B_INT16|B_NOESP, + B_NONE, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV|D_SIZE01, 0, + 1, 0x000000FE, 0x00000088, 0x00, + B_INT|B_CHG, + B_REG, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV|D_SIZE01, 0, + 1, 0x000000FE, 0x0000008A, 0x00, + B_REG|B_CHG, + B_INT, + B_NONE, + B_NONE }, + + { T("MOV"), + D_CMD|D_REGISTER|D_RARE, 0, + 1, 0x0000C0FF, 0x0000C08C, 0x00, + B_INT|B_REGISTER|B_NOESP|B_CHG, + B_SEG, + B_NONE, + B_NONE }, + + { T("MOV"), + D_CMD|D_MEMORY|D_RARE, 0, + 1, 0x000000FF, 0x0000008C, 0x00, + B_INT16|B_MEMORY|B_CHG, + B_SEG, + B_NONE, + B_NONE }, + + { T("MOV"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x0000008E, 0x00, + B_SEGNOCS|B_CHG, + B_INT|B_REGISTER|B_NOESP, + B_NONE, + B_NONE }, + + { T("MOV"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x0000008E, 0x00, + B_SEGNOCS|B_CHG, + B_INT16|B_MEMORY|B_NOESP, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV|D_SIZE01, 0, + 1, 0x000000FE, 0x000000A0, 0x00, + B_ACC|B_CHG, + B_IMMINT, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV|D_SIZE01, 0, + 1, 0x000000FE, 0x000000A2, 0x00, + B_IMMINT|B_CHG, + B_ACC, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV, 0, + 1, 0x000000F8, 0x000000B0, 0x00, + B_REGCMD8|B_CHG, + B_CONST8, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV, 0, + 1, 0x000000F8, 0x000000B8, 0x00, + B_REGCMD|B_NOESP|B_CHG, + B_CONST, + B_NONE, + B_NONE }, + + { T("MOV"), + D_MOV|D_SIZE01, 0, + 1, 0x000038FE, 0x000000C6, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_CHG, + B_CONST, + B_NONE, + B_NONE }, + + { T("MOV"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000220F, 0x00, + B_CR|B_CHG, + B_INT32|B_BINARY|B_REGONLY|B_NOESP, + B_NONE, + B_NONE }, + + { T("MOV"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000200F, 0x00, + B_INT32|B_BINARY|B_REGONLY|B_NOESP|B_CHG, + B_CR, + B_NONE, + B_NONE }, + + { T("MOV"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000230F, 0x00, + B_DR|B_CHG, + B_INT32|B_BINARY|B_REGONLY|B_NOESP, + B_NONE, + B_NONE }, + + { T("MOV"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000210F, 0x00, + B_INT32|B_BINARY|B_REGONLY|B_NOESP|B_CHG, + B_DR, + B_NONE, + B_NONE }, + + { T("MOVSX"), + D_MOV, 0, + 2, 0x0000FFFF, 0x0000BE0F, 0x00, + B_REG|B_NOESP|B_CHG, + B_INT8|B_SIGNED|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("MOVSX"), + D_MOV, 0, + 2, 0x0000FFFF, 0x0000BF0F, 0x00, + B_REG32|B_NOESP|B_CHG, + B_INT16|B_SIGNED|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("MOVZX"), + D_MOV, 0, + 2, 0x0000FFFF, 0x0000B60F, 0x00, + B_REG|B_NOESP|B_CHG, + B_INT8|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("MOVZX"), + D_MOV, 0, + 2, 0x0000FFFF, 0x0000B70F, 0x00, + B_REG32|B_NOESP|B_CHG, + B_INT16|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("MUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000020F6, 0x00, + B_AX|B_UPD|B_PSEUDO, + B_AL|B_PSEUDO, + B_INT8|B_UNSIGNED|B_SHOWSIZE, + B_NONE }, + + { T("MUL"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000038FF, 0x000020F7, 0x00, + B_DXEDX|B_CHG|B_PSEUDO, + B_ACC|B_UPD|B_PSEUDO, + B_INT1632|B_UNSIGNED|B_NOESP|B_SHOWSIZE, + B_NONE }, + + { T("NEG"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000018F6, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOT"), + D_CMD|D_SIZE01|D_LOCKABLE, 0, + 1, 0x000038FE, 0x000010F6, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_NONE, + B_NONE, + B_NONE }, + + { T("OR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB, + 1, 0x000000FE, 0x0000000C, 0x00, + B_ACC|B_BINARY|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("OR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00000880, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("OR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00000882, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_SXTCONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("OR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB, + 1, 0x000000FE, 0x00000008, 0x00, + B_INT|B_BINARY|B_NOESP|B_UPD, + B_REG|B_BINARY, + B_NONE, + B_NONE }, + + { T("OR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB, + 1, 0x000000FE, 0x0000000A, 0x00, + B_REG|B_BINARY|B_NOESP|B_UPD, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("OUT"), + D_IO|D_SIZE01|D_RARE, 0, + 1, 0x000000FE, 0x000000E6, 0x00, + B_CONST8|B_PORT, + B_ACC, + B_NONE, + B_NONE }, + + { T("OUT"), + D_IO|D_SIZE01|D_RARE, 0, + 1, 0x000000FE, 0x000000EE, 0x00, + B_DXPORT|B_PORT, + B_ACC, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP, 0, + 1, 0x000038FF, 0x0000008F, 0x00, + B_INT|B_SHOWSIZE|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP, 0, + 1, 0x000000F8, 0x00000058, 0x00, + B_REGCMD|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x0000001F, 0x00, + B_SEGDS|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x00000007, 0x00, + B_SEGES|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP|D_RARE, DX_JB, + 1, 0x000000FF, 0x00000017, 0x00, + B_SEGSS|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP|D_RARE, 0, + 2, 0x0000FFFF, 0x0000A10F, 0x00, + B_SEGFS|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POP"), + D_POP|D_CHGESP|D_RARE, 0, + 2, 0x0000FFFF, 0x0000A90F, 0x00, + B_SEGGS|B_CHG, + B_STKTOP|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("POPA*"), + D_CMD|D_CHGESP|D_WILDCARD, 0, + 1, 0x000000FF, 0x00000061, 0x00, + B_STKTOPA|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("POPF*"), + D_POP|D_ALLFLAGS|D_CHGESP|D_WILDCARD, 0, + 1, 0x000000FF, 0x0000009D, 0x00, + B_EFL|B_CHG|B_PSEUDO, + B_STKTOPEFL|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP, 0, + 1, 0x000038FF, 0x000030FF, 0x00, + B_INT|B_SHOWSIZE, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP, 0, + 1, 0x000000F8, 0x00000050, 0x00, + B_REGCMD, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP, 0, + 1, 0x000000FF, 0x0000006A, 0x00, + B_SXTCONST|B_SHOWSIZE, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP, 0, + 1, 0x000000FF, 0x00000068, 0x00, + B_CONSTL|B_SHOWSIZE, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x0000000E, 0x00, + B_SEGCS, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x00000016, 0x00, + B_SEGSS, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x0000001E, 0x00, + B_SEGDS, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x00000006, 0x00, + B_SEGES, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 2, 0x0000FFFF, 0x0000A00F, 0x00, + B_SEGFS, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSH"), + D_PUSH|D_CHGESP|D_RARE, 0, + 2, 0x0000FFFF, 0x0000A80F, 0x00, + B_SEGGS, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("PUSHA*"), + D_CMD|D_CHGESP|D_WILDCARD, 0, + 1, 0x000000FF, 0x00000060, 0x00, + B_PUSHA|B_CHG|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("PUSHF*"), + D_PUSH|D_CHGESP|D_WILDCARD, DX_JB, + 1, 0x000000FF, 0x0000009C, 0x00, + B_EFL|B_PSEUDO, + B_PUSH|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("RCL"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000010D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RCL"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000010D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RCL"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000010C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RCR"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000018D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RCR"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000018D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RCR"), + D_CMD|D_SIZE01|D_FLAGSCO|D_USESCARRY, DX_JC, + 1, 0x000038FE, 0x000018C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROL"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000000D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROL"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000000D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROL"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000000C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROR"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000008D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROR"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000008D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("ROR"), + D_CMD|D_SIZE01|D_FLAGSCO, DX_JC, + 1, 0x000038FE, 0x000008C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("RDMSR"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000320F, 0x00, + B_EDX|B_BINARY|B_CHG|B_PSEUDO, + B_EAX|B_BINARY|B_CHG|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("RDPMC"), + D_SYS|D_RARE, 0, + 2, 0x0000FFFF, 0x0000330F, 0x00, + B_EDX|B_BINARY|B_CHG|B_PSEUDO, + B_EAX|B_BINARY|B_CHG|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("RDTSC"), + D_SYS|D_RARE, 0, + 2, 0x0000FFFF, 0x0000310F, 0x00, + B_EDX|B_BINARY|B_CHG|B_PSEUDO, + B_EAX|B_BINARY|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("RDTSCP"), + D_SYS|D_RARE, 0, + 3, 0x00FFFFFF, 0x00F9010F, 0x00, + B_EDX|B_BINARY|B_CHG|B_PSEUDO, + B_EAX|B_BINARY|B_CHG|B_PSEUDO, + B_ECX|B_BINARY|B_CHG|B_PSEUDO, + B_NONE }, + + { T("RETN"), + D_RET|D_NOREP|D_CHGESP, DX_RETN, + 1, 0x000000FF, 0x000000C3, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("RET"), + D_RET|D_NOREP|D_CHGESP, 0, + 1, 0x000000FF, 0x000000C3, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("RETN"), + D_RET|D_MUSTREP|D_CHGESP, DX_RETN, + 1, 0x000000FF, 0x000000C3, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("RET"), + D_RET|D_MUSTREP|D_CHGESP, 0, + 1, 0x000000FF, 0x000000C3, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("RETN"), + D_RET|D_CHGESP, DX_RETN, + 1, 0x000000FF, 0x000000C2, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_CONST16|B_STACKINC, + B_NONE, + B_NONE }, + + { T("RET"), + D_RET|D_CHGESP, 0, + 1, 0x000000FF, 0x000000C2, 0x00, + B_STKTOP|B_JMPCALL|B_PSEUDO, + B_CONST16|B_STACKINC, + B_NONE, + B_NONE }, + + { T("RETF"), + D_RETFAR|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x000000CB, 0x00, + B_STKTOPFAR|B_JMPCALLFAR|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("RETF"), + D_RETFAR|D_CHGESP|D_RARE, 0, + 1, 0x000000FF, 0x000000CA, 0x00, + B_STKTOPFAR|B_JMPCALLFAR|B_PSEUDO, + B_CONST16|B_STACKINC, + B_NONE, + B_NONE }, + + { T("RSM"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000AA0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("SAHF"), + D_CMD|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x0000009E, 0x00, + B_AH|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("SHL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SHL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SHL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000020C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_UNDOC, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000030D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_UNDOC, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000030D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAL"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_UNDOC, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000030C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SALC"), + D_CMD|D_ALLFLAGS|D_UNDOC, DX_JZ|DX_JC, + 1, 0x000000FF, 0x000000D6, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("SHR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000028D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SHR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000028D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SHR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000028C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000038D0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_1|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000038D2, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CL|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SAR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JC, + 1, 0x000038FE, 0x000038C0, 0x00, + B_INT|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST8|B_SHIFTCNT, + B_NONE, + B_NONE }, + + { T("SBB"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x0000001C, 0x00, + B_ACC|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("SBB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00001880, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("SBB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000038FE, 0x00001882, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_SXTCONST, + B_NONE, + B_NONE }, + + { T("SBB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x00000018, 0x00, + B_INT|B_UPD, + B_REG, + B_NONE, + B_NONE }, + + { T("SBB"), + D_CMD|D_SIZE01|D_ALLFLAGS|D_USESCARRY, DX_JZ|DX_JB, + 1, 0x000000FE, 0x0000001A, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("SETO"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x0000900F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNO"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x0000910F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETB"), + D_SETC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000920F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETC"), + D_SETC|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000920F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNAE"), + D_SETC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000920F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETAE"), + D_SETC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000930F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNB"), + D_SETC|D_COND|D_USESCARRY, DX_JB, + 2, 0x0000FFFF, 0x0000930F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNC"), + D_SETC|D_COND|D_USESCARRY, DX_JC, + 2, 0x0000FFFF, 0x0000930F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETE"), + D_SETC|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000940F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETZ"), + D_SETC|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000940F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNE"), + D_SETC|D_COND, DX_JE, + 2, 0x0000FFFF, 0x0000950F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNZ"), + D_SETC|D_COND, DX_JZ, + 2, 0x0000FFFF, 0x0000950F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETBE"), + D_SETC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000960F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNA"), + D_SETC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000960F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETA"), + D_SETC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000970F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNBE"), + D_SETC|D_COND|D_USESCARRY, 0, + 2, 0x0000FFFF, 0x0000970F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETS"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x0000980F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNS"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x0000990F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETPE"), + D_SETC|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00009A0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETP"), + D_SETC|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00009A0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETPO"), + D_SETC|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00009B0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNP"), + D_SETC|D_COND|D_RARE, 0, + 2, 0x0000FFFF, 0x00009B0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETL"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009C0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNGE"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009C0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETGE"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009D0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNL"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009D0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETLE"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009E0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNG"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009E0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETG"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009F0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SETNLE"), + D_SETC|D_COND, 0, + 2, 0x0000FFFF, 0x00009F0F, 0x00, + B_INT8|B_CHG, + B_ANYREG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SGDT"), + D_SYS|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0000010F, 0x00, + B_DESCR|B_MEMONLY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("SIDT"), + D_SYS|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0008010F, 0x00, + B_DESCR|B_MEMONLY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("SHLD"), + D_CMD|D_ALLFLAGS, DX_JZ|DX_JC, + 2, 0x0000FFFF, 0x0000A40F, 0x00, + B_INT|B_NOESP|B_UPD, + B_REG, + B_CONST8|B_SHIFTCNT, + B_NONE }, + + { T("SHLD"), + D_CMD|D_ALLFLAGS, DX_JZ|DX_JC, + 2, 0x0000FFFF, 0x0000A50F, 0x00, + B_INT|B_NOESP|B_UPD, + B_REG, + B_CL|B_SHIFTCNT, + B_NONE }, + + { T("SHRD"), + D_CMD|D_ALLFLAGS, DX_JZ|DX_JC, + 2, 0x0000FFFF, 0x0000AC0F, 0x00, + B_INT|B_NOESP|B_UPD, + B_REG, + B_CONST8|B_SHIFTCNT, + B_NONE }, + + { T("SHRD"), + D_CMD|D_ALLFLAGS, DX_JZ|DX_JC, + 2, 0x0000FFFF, 0x0000AD0F, 0x00, + B_INT|B_NOESP|B_UPD, + B_REG, + B_CL|B_SHIFTCNT, + B_NONE }, + + { T("SLDT"), + D_SYS|D_RARE, 0, + 2, 0x0038FFFF, 0x0000000F, 0x00, + B_INT|B_NOESP|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("SMSW"), + D_SYS|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0020010F, 0x00, + B_INT16|B_MEMONLY|B_CHG, + B_CR0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SMSW"), + D_SYS|D_REGISTER|D_RARE, 0, + 2, 0x0038FFFF, 0x0020010F, 0x00, + B_INT|B_REGONLY|B_NOESP|B_CHG, + B_CR0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STC"), + D_CMD|D_FLAGC, 0, + 1, 0x000000FF, 0x000000F9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("STD"), + D_CMD|D_FLAGD, 0, + 1, 0x000000FF, 0x000000FD, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("STI"), + D_CMD|D_RARE, 0, + 1, 0x000000FF, 0x000000FB, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("STMXCSR"), + D_CMD|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0018AE0F, 0x00, + B_INT32|B_BINARY|B_MEMONLY|B_NOESP|B_SHOWSIZE|B_CHG, + B_MXCSR|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STR"), + D_SYS|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0008000F, 0x00, + B_INT16|B_MEMONLY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("STR"), + D_SYS|D_REGISTER|D_RARE, 0, + 2, 0x0038FFFF, 0x0008000F, 0x00, + B_INT|B_REGONLY|B_NOESP|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("SUB"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB|DX_SUB, + 1, 0x000000FE, 0x0000002C, 0x00, + B_ACC|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("SUB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_SUB, + 1, 0x000038FE, 0x00002880, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_CONST, + B_NONE, + B_NONE }, + + { T("SUB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_SUB, + 1, 0x000038FE, 0x00002882, 0x00, + B_INT|B_SHOWSIZE|B_UPD, + B_SXTCONST, + B_NONE, + B_NONE }, + + { T("SUB"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ|DX_JB|DX_SUB, + 1, 0x000000FE, 0x00000028, 0x00, + B_INT|B_UPD, + B_REG, + B_NONE, + B_NONE }, + + { T("SUB"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ|DX_JB|DX_SUB, + 1, 0x000000FE, 0x0000002A, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("SYSENTER"), + D_SYS|D_RARE, 0, + 2, 0x0000FFFF, 0x0000340F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("SYSEXIT"), + D_SYS|D_ALLFLAGS|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000350F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("TEST"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x000000A8, 0x00, + B_ACC|B_BINARY, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("TEST"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000038FE, 0x000000F6, 0x00, + B_INT|B_BINARY|B_SHOWSIZE, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("TEST"), + D_TEST|D_SIZE01|D_ALLFLAGS|D_UNDOC, DX_JZ, + 1, 0x000038FE, 0x000008F6, 0x00, + B_INT|B_BINARY|B_SHOWSIZE, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("TEST"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000084, 0x00, + B_INT|B_BINARY, + B_REG|B_BINARY, + B_NONE, + B_NONE }, + + { T("TEST"), + D_TEST|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000084, 0x00, + B_REG|B_BINARY, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("UD1"), + D_CMD|D_UNDOC, 0, + 2, 0x0000FFFF, 0x0000B90F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("UD2"), + D_CMD, 0, + 2, 0x0000FFFF, 0x00000B0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VERR"), + D_CMD|D_FLAGZ|D_RARE, 0, + 2, 0x0038FFFF, 0x0020000F, 0x00, + B_INT16|B_NOESP, + B_NONE, + B_NONE, + B_NONE }, + + { T("VERW"), + D_CMD|D_FLAGZ|D_RARE, 0, + 2, 0x0038FFFF, 0x0028000F, 0x00, + B_INT16|B_NOESP, + B_NONE, + B_NONE, + B_NONE }, + + { T("WBINVD"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000090F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("WRMSR"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000300F, 0x00, + B_EDX|B_BINARY|B_PSEUDO, + B_EAX|B_BINARY|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("XADD"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JE|DX_JB, + 2, 0x0000FEFF, 0x0000C00F, 0x00, + B_INT|B_UPD, + B_REG|B_CHG, + B_NONE, + B_NONE }, + + { T("XCHG"), + D_MOV|D_LOCKABLE, 0, + 1, 0x000000F8, 0x00000090, 0x00, + B_ACC|B_CHG, + B_REGCMD|B_CHG, + B_NONE, + B_NONE }, + + { T("XCHG"), + D_MOV, 0, + 1, 0x000000F8, 0x00000090, 0x00, + B_REGCMD|B_CHG, + B_ACC|B_CHG, + B_NONE, + B_NONE }, + + { T("XCHG"), + D_MOV|D_SIZE01|D_LOCKABLE, 0, + 1, 0x000000FE, 0x00000086, 0x00, + B_INT|B_CHG, + B_REG|B_CHG, + B_NONE, + B_NONE }, + + { T("XCHG"), + D_MOV|D_SIZE01|D_LOCKABLE, 0, + 1, 0x000000FE, 0x00000086, 0x00, + B_REG|B_CHG, + B_INT|B_CHG, + B_NONE, + B_NONE }, + + { T("XLAT"), + D_CMD, 0, + 1, 0x000000FF, 0x000000D7, 0x00, + B_AL|B_CHG|B_PSEUDO, + B_XLATMEM, + B_NONE, + B_NONE }, + + { T("XLATB"), + D_CMD, 0, + 1, 0x000000FF, 0x000000D7, 0x00, + B_AL|B_UPD|B_PSEUDO, + B_XLATMEM|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("XOR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000034, 0x00, + B_ACC|B_BINARY|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("XOR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000038FE, 0x00003080, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_CONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("XOR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000038FE, 0x00003082, 0x00, + B_INT|B_BINARY|B_NOESP|B_SHOWSIZE|B_UPD, + B_SXTCONST|B_BINARY, + B_NONE, + B_NONE }, + + { T("XOR"), + D_CMD|D_SIZE01|D_LOCKABLE|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000030, 0x00, + B_INT|B_BINARY|B_UPD, + B_REG|B_BINARY, + B_NONE, + B_NONE }, + + { T("XOR"), + D_CMD|D_SIZE01|D_ALLFLAGS, DX_JZ, + 1, 0x000000FE, 0x00000032, 0x00, + B_REG|B_BINARY|B_UPD, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("CMPS"), + D_CMD|D_SIZE01|D_LONGFORM|D_NOREP|D_ALLFLAGS|D_HLADIR, DX_JE|DX_JB, + 1, 0x000000FE, 0x000000A6, 0x00, + B_STRSRC|B_SHOWSIZE, + B_STRDEST|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CMPSB"), + D_CMD|D_NOREP|D_ALLFLAGS, DX_JE|DX_JB, + 1, 0x000000FF, 0x000000A6, 0x00, + B_STRSRC8|B_PSEUDO, + B_STRDEST8|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CMPS*"), + D_CMD|D_NOREP|D_ALLFLAGS|D_WILDCARD, DX_JE|DX_JB, + 1, 0x000000FF, 0x000000A7, 0x00, + B_STRSRC|B_PSEUDO, + B_STRDEST|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("CMPS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPE|D_ALLFLAGS|D_HLADIR, 0, + 1, 0x000000FE, 0x000000A6, 0x00, + B_STRSRC|B_SHOWSIZE, + B_STRDEST|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPSB"), + D_STRING|D_MUSTREPE|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x000000A6, 0x00, + B_STRSRC8|B_PSEUDO, + B_STRDEST8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPS*"), + D_STRING|D_MUSTREPE|D_ALLFLAGS|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000A7, 0x00, + B_STRSRC|B_PSEUDO, + B_STRDEST|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_ALLFLAGS|D_HLADIR, 0, + 1, 0x000000FE, 0x000000A6, 0x00, + B_STRSRC|B_SHOWSIZE, + B_STRDEST|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPSB"), + D_STRING|D_MUSTREPNE|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x000000A6, 0x00, + B_STRSRC8|B_PSEUDO, + B_STRDEST8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("CMPS*"), + D_STRING|D_MUSTREPNE|D_ALLFLAGS|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000A7, 0x00, + B_STRSRC|B_PSEUDO, + B_STRDEST|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODS"), + D_CMD|D_SIZE01|D_LONGFORM|D_NOREP, 0, + 1, 0x000000FE, 0x000000AC, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("LODSB"), + D_CMD|D_NOREP, 0, + 1, 0x000000FF, 0x000000AC, 0x00, + B_AL|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("LODS*"), + D_CMD|D_NOREP|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000AD, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("LODS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREP|D_RARE, 0, + 1, 0x000000FE, 0x000000AC, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODSB"), + D_STRING|D_MUSTREP|D_RARE, 0, + 1, 0x000000FF, 0x000000AC, 0x00, + B_AL|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODS*"), + D_STRING|D_MUSTREP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x000000AD, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FE, 0x000000AC, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODSB"), + D_STRING|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FF, 0x000000AC, 0x00, + B_AL|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("LODS*"), + D_STRING|D_MUSTREPNE|D_WILDCARD|D_UNDOC, 0, + 1, 0x000000FF, 0x000000AD, 0x00, + B_ACC|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVS"), + D_CMD|D_SIZE01|D_LONGFORM|D_NOREP, 0, + 1, 0x000000FE, 0x000000A4, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_STRSRC|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("MOVSB"), + D_CMD|D_NOREP, 0, + 1, 0x000000FF, 0x000000A4, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("MOVS*"), + D_CMD|D_NOREP|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000A5, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("MOVS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREP, 0, + 1, 0x000000FE, 0x000000A4, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVSB"), + D_STRING|D_MUSTREP, 0, + 1, 0x000000FF, 0x000000A4, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVS*"), + D_STRING|D_MUSTREP|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000A5, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FE, 0x000000A4, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVSB"), + D_STRING|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FF, 0x000000A4, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVS*"), + D_STRING|D_MUSTREPNE|D_WILDCARD|D_UNDOC, 0, + 1, 0x000000FF, 0x000000A5, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCAS"), + D_CMD|D_SIZE01|D_LONGFORM|D_NOREP|D_ALLFLAGS, DX_JE|DX_JB, + 1, 0x000000FE, 0x000000AE, 0x00, + B_STRDEST|B_SHOWSIZE, + B_ACC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SCASB"), + D_CMD|D_NOREP|D_ALLFLAGS, DX_JE|DX_JB, + 1, 0x000000FF, 0x000000AE, 0x00, + B_STRDEST8|B_PSEUDO, + B_AL|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SCAS*"), + D_CMD|D_NOREP|D_ALLFLAGS|D_WILDCARD, DX_JE|DX_JB, + 1, 0x000000FF, 0x000000AF, 0x00, + B_STRDEST|B_PSEUDO, + B_ACC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SCAS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPE|D_ALLFLAGS, 0, + 1, 0x000000FE, 0x000000AE, 0x00, + B_STRDEST|B_SHOWSIZE, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCASB"), + D_STRING|D_MUSTREPE|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x000000AE, 0x00, + B_STRDEST8|B_PSEUDO, + B_AL|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCAS*"), + D_STRING|D_MUSTREPE|D_ALLFLAGS|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000AF, 0x00, + B_STRDEST|B_PSEUDO, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCAS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_ALLFLAGS, 0, + 1, 0x000000FE, 0x000000AE, 0x00, + B_STRDEST|B_SHOWSIZE, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCASB"), + D_STRING|D_MUSTREPNE|D_ALLFLAGS, 0, + 1, 0x000000FF, 0x000000AE, 0x00, + B_STRDEST8|B_PSEUDO, + B_AL|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("SCAS*"), + D_STRING|D_MUSTREPNE|D_ALLFLAGS|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000AF, 0x00, + B_STRDEST|B_PSEUDO, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOS"), + D_CMD|D_SIZE01|D_LONGFORM|D_NOREP, 0, + 1, 0x000000FE, 0x000000AA, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_ACC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STOSB"), + D_CMD|D_NOREP, 0, + 1, 0x000000FF, 0x000000AA, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_AL|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STOS*"), + D_CMD|D_NOREP|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000AB, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_ACC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("STOS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREP, 0, + 1, 0x000000FE, 0x000000AA, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOSB"), + D_STRING|D_MUSTREP, 0, + 1, 0x000000FF, 0x000000AA, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_AL|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOS*"), + D_STRING|D_MUSTREP|D_WILDCARD, 0, + 1, 0x000000FF, 0x000000AB, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOS"), + D_STRING|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FE, 0x000000AA, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOSB"), + D_STRING|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FF, 0x000000AA, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_AL|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("STOS*"), + D_STRING|D_MUSTREPNE|D_WILDCARD|D_UNDOC, 0, + 1, 0x000000FF, 0x000000AB, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_ACC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INS"), + D_IO|D_SIZE01|D_LONGFORM|D_NOREP|D_RARE, 0, + 1, 0x000000FE, 0x0000006C, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_DXPORT|B_PORT, + B_NONE, + B_NONE }, + + { T("INSB"), + D_IO|D_NOREP|D_RARE, 0, + 1, 0x000000FF, 0x0000006C, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("INS*"), + D_IO|D_NOREP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x0000006D, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("INS"), + D_IO|D_SIZE01|D_LONGFORM|D_MUSTREP|D_RARE, 0, + 1, 0x000000FE, 0x0000006C, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_DXPORT|B_PORT, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INSB"), + D_IO|D_MUSTREP|D_RARE, 0, + 1, 0x000000FF, 0x0000006C, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INS*"), + D_IO|D_MUSTREP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x0000006D, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INS"), + D_IO|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FE, 0x0000006C, 0x00, + B_STRDEST|B_SHOWSIZE|B_CHG, + B_DXPORT|B_PORT, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INSB"), + D_IO|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FF, 0x0000006C, 0x00, + B_STRDEST8|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("INS*"), + D_IO|D_MUSTREPNE|D_WILDCARD|D_UNDOC, 0, + 1, 0x000000FF, 0x0000006D, 0x00, + B_STRDEST|B_CHG|B_PSEUDO, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTS"), + D_IO|D_SIZE01|D_LONGFORM|D_NOREP|D_RARE, 0, + 1, 0x000000FE, 0x0000006E, 0x00, + B_DXPORT|B_PORT, + B_STRSRC|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("OUTSB"), + D_IO|D_NOREP|D_RARE, 0, + 1, 0x000000FF, 0x0000006E, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("OUTS*"), + D_IO|D_NOREP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x0000006F, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("OUTS"), + D_IO|D_SIZE01|D_LONGFORM|D_MUSTREP|D_RARE, 0, + 1, 0x000000FE, 0x0000006E, 0x00, + B_DXPORT|B_PORT, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTSB"), + D_IO|D_MUSTREP|D_RARE, 0, + 1, 0x000000FF, 0x0000006E, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTS*"), + D_IO|D_MUSTREP|D_WILDCARD|D_RARE, 0, + 1, 0x000000FF, 0x0000006F, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTS"), + D_IO|D_SIZE01|D_LONGFORM|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FE, 0x0000006E, 0x00, + B_DXPORT|B_PORT, + B_STRSRC|B_SHOWSIZE, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTSB"), + D_IO|D_MUSTREPNE|D_UNDOC, 0, + 1, 0x000000FF, 0x0000006E, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC8|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("OUTS*"), + D_IO|D_MUSTREPNE|D_WILDCARD|D_UNDOC, 0, + 1, 0x000000FF, 0x0000006F, 0x00, + B_DXPORT|B_PORT|B_PSEUDO, + B_STRSRC|B_PSEUDO, + B_STRCNT|B_UPD|B_PSEUDO, + B_NONE }, + + { T("MOVBE"), + D_CMD|D_NOREP, 0, + 3, 0x00FFFFFF, 0x00F0380F, 0x00, + B_REG|B_CHG, + B_INT|B_MEMONLY, + B_NONE, + B_NONE }, + + { T("MOVBE"), + D_CMD|D_NOREP, 0, + 3, 0x00FFFFFF, 0x00F1380F, 0x00, + B_INT|B_MEMONLY|B_CHG, + B_REG, + B_NONE, + B_NONE }, + + { T("XGETBV"), + D_SYS|D_MUSTNONE|D_RARE, 0, + 3, 0x00FFFFFF, 0x00D0010F, 0x00, + B_EAX|B_CHG|B_PSEUDO, + B_EDX|B_CHG|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("XSETBV"), + D_PRIVILEGED|D_MUSTNONE|D_RARE, 0, + 3, 0x00FFFFFF, 0x00D1010F, 0x00, + B_EAX|B_PSEUDO, + B_EDX|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("XRSTOR"), + D_SYS|D_MUSTNONE|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0028AE0F, 0x00, + B_ANYMEM|B_MEMONLY, + B_EAX|B_PSEUDO, + B_EDX|B_PSEUDO, + B_NONE }, + + { T("XSAVE"), + D_SYS|D_MUSTNONE|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0020AE0F, 0x00, + B_ANYMEM|B_MEMONLY|B_CHG, + B_EAX|B_PSEUDO, + B_EDX|B_PSEUDO, + B_NONE }, + + { T("F2XM1"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000F0D9, 0x00, + B_ST0|B_CHG|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FABS"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E1D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FCHS"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E0D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FCLEX"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E2DB, 0x00, + B_FST|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FCOMPP"), + D_FPU|D_FPUPOP2, 0, + 2, 0x0000FFFF, 0x0000D9DE, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FCOS"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000FFD9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FDECSTP"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000F6D9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FINCSTP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F7D9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FINIT"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E3DB, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLD1"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000E8D9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDL2T"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000E9D9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDL2E"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000EAD9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDPI"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000EBD9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDLG2"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000ECD9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDLN2"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000EDD9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDZ"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000EED9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FNOP"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000D0D9, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FPATAN"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F3D9, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FPREM"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000F8D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FPREM1"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000F5D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FPTAN"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000F2D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FRNDINT"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000FCD9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSCALE"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000FDD9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSIN"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000FED9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSINCOS"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000FBD9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSQRT"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000FAD9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSTSW"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E0DF, 0x00, + B_AX|B_CHG, + B_FST|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FTST"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E4D9, 0x00, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FUCOMPP"), + D_FPU|D_FPUPOP2, 0, + 2, 0x0000FFFF, 0x0000E9DA, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FXAM"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E5D9, 0x00, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FXTRACT"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000FFFF, 0x0000F4D9, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("FYL2X"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F1D9, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FYL2XP1"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F9D9, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FENI"), + D_FPU|D_RARE, 0, + 2, 0x0000FFFF, 0x0000E0DB, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FDISI"), + D_FPU|D_RARE, 0, + 2, 0x0000FFFF, 0x0000E1DB, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FADD"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C0D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FADD"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C0DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FADDP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000C0DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FADDP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000C1DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FCMOVB"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000C0DA, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVE"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000C8DA, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVBE"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000D0DA, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVU"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000D8DA, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVNB"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000C0DB, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVNE"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000C8DB, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVNBE"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000D0DB, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVNU"), + D_FPU|D_COND, 0, + 2, 0x0000F8FF, 0x0000D8DB, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCOM"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000D0D8, 0x00, + B_ST0|B_PSEUDO, + B_ST, + B_NONE, + B_NONE }, + + { T("FCOM"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000D1D8, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FCOMP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000D8D8, 0x00, + B_ST0|B_PSEUDO, + B_ST, + B_NONE, + B_NONE }, + + { T("FCOMP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000D9D8, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FCOMI"), + D_FPU|D_FLAGSZPC, 0, + 2, 0x0000F8FF, 0x0000F0DB, 0x00, + B_ST0, + B_ST, + B_NONE, + B_NONE }, + + { T("FCOMIP"), + D_FPU|D_FLAGSZPC|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000F0DF, 0x00, + B_ST0, + B_ST, + B_NONE, + B_NONE }, + + { T("FUCOMI"), + D_FPU|D_FLAGSZPC, 0, + 2, 0x0000F8FF, 0x0000E8DB, 0x00, + B_ST0, + B_ST, + B_NONE, + B_NONE }, + + { T("FUCOMIP"), + D_FPU|D_FLAGSZPC|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000E8DF, 0x00, + B_ST0, + B_ST, + B_NONE, + B_NONE }, + + { T("FDIV"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000F0D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FDIV"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000F8DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FDIVP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000F8DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FDIVP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F9DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FDIVR"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000F8D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FDIVR"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000F0DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FDIVRP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000F0DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FDIVRP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000F1DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FFREE"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C0DD, 0x00, + B_ST, + B_NONE, + B_NONE, + B_NONE }, + + { T("FFREEP"), + D_FPU|D_FPUPOP|D_UNDOC, 0, + 2, 0x0000F8FF, 0x0000C0DF, 0x00, + B_ST, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLD"), + D_FPU|D_FPUPUSH, 0, + 2, 0x0000F8FF, 0x0000C0D9, 0x00, + B_ST, + B_NONE, + B_NONE, + B_NONE }, + + { T("FMUL"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C8D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FMUL"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C8DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FMULP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000C8DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FMULP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000C9DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FST"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000D0DD, 0x00, + B_ST|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000D8DD, 0x00, + B_ST|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSUB"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000E0D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FSUB"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000E8DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FSUBP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000E8DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FSUBP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000E9DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSUBR"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000E8D8, 0x00, + B_ST0|B_UPD, + B_ST, + B_NONE, + B_NONE }, + + { T("FSUBR"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000E0DC, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FSUBRP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000E0DE, 0x00, + B_ST|B_UPD, + B_ST0, + B_NONE, + B_NONE }, + + { T("FSUBRP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000E1DE, 0x00, + B_ST1|B_UPD|B_PSEUDO, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FUCOM"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000E0DD, 0x00, + B_ST0|B_PSEUDO, + B_ST, + B_NONE, + B_NONE }, + + { T("FUCOM"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000E1DD, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FUCOMP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000F8FF, 0x0000E8DD, 0x00, + B_ST0|B_PSEUDO, + B_ST, + B_NONE, + B_NONE }, + + { T("FUCOMP"), + D_FPU|D_FPUPOP, 0, + 2, 0x0000FFFF, 0x0000E9DD, 0x00, + B_ST0|B_PSEUDO, + B_ST1|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FXCH"), + D_FPU, 0, + 2, 0x0000F8FF, 0x0000C8D9, 0x00, + B_ST0|B_CHG|B_PSEUDO, + B_ST|B_CHG, + B_NONE, + B_NONE }, + + { T("FXCH"), + D_FPU, 0, + 2, 0x0000FFFF, 0x0000C9D9, 0x00, + B_ST0|B_CHG|B_PSEUDO, + B_ST1|B_CHG|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FADD"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000000D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FADD"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000000DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIADD"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000000DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIADD"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000000DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FBLD"), + D_FPU|D_MEMORY|D_FPUPUSH|D_RARE, 0, + 1, 0x000038FF, 0x000020DF, 0x00, + B_BCD|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("FBSTP"), + D_FPU|D_MEMORY|D_FPUPOP|D_RARE, 0, + 1, 0x000038FF, 0x000030DF, 0x00, + B_BCD|B_MEMORY|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FCOM"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010D8, 0x00, + B_ST0|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FCOM"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DC, 0x00, + B_ST0|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FCOMP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018D8, 0x00, + B_ST0|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FCOMP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DC, 0x00, + B_ST0|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FDIV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FDIV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIDIV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIDIV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FDIVR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FDIVR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIDIVR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIDIVR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FICOM"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DE, 0x00, + B_ST0|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FICOM"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DA, 0x00, + B_ST0|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FICOMP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DE, 0x00, + B_ST0|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FICOMP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DA, 0x00, + B_ST0|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FILD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000000DF, 0x00, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FILD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000000DB, 0x00, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FILD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000028DF, 0x00, + B_INT64|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FIST"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DF, 0x00, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FIST"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DB, 0x00, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DF, 0x00, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DB, 0x00, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000038DF, 0x00, + B_INT64|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000008DF, 0x00, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000008DB, 0x00, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FISTTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000008DD, 0x00, + B_INT64|B_SIGNED|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FLD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000000D9, 0x00, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000000DD, 0x00, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLD"), + D_FPU|D_MEMORY|D_FPUPUSH, 0, + 1, 0x000038FF, 0x000028DB, 0x00, + B_FLOAT80|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FLDCW"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000028D9, 0x00, + B_FCW|B_CHG|B_PSEUDO, + B_INT16|B_BINARY|B_MEMORY, + B_NONE, + B_NONE }, + + { T("FLDENV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020D9, 0x00, + B_LONGDATA|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("FMUL"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000008D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FMUL"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000008DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIMUL"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000008DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FIMUL"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000008DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FRSTOR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020DD, 0x00, + B_LONGDATA|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSAVE"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030DD, 0x00, + B_LONGDATA|B_MEMORY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("FST"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010D9, 0x00, + B_FLOAT32|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FST"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000010DD, 0x00, + B_FLOAT64|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018D9, 0x00, + B_FLOAT32|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000018DD, 0x00, + B_FLOAT64|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTP"), + D_FPU|D_MEMORY|D_FPUPOP, 0, + 1, 0x000038FF, 0x000038DB, 0x00, + B_FLOAT80|B_MEMORY|B_SHOWSIZE|B_CHG, + B_ST0|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTCW"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038D9, 0x00, + B_INT16|B_BINARY|B_MEMORY|B_CHG, + B_FCW|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSTENV"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000030D9, 0x00, + B_LONGDATA|B_MEMORY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("FSTSW"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000038DD, 0x00, + B_INT16|B_BINARY|B_MEMORY|B_CHG, + B_FST|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("FSUB"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FSUB"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FISUB"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FISUB"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000020DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FSUBR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000028D8, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT32|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FSUBR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000028DC, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_FLOAT64|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FISUBR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000028DA, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT32|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FISUBR"), + D_FPU|D_MEMORY, 0, + 1, 0x000038FF, 0x000028DE, 0x00, + B_ST0|B_UPD|B_PSEUDO, + B_INT16|B_SIGNED|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("FSETPM"), + D_FPU|D_UNDOC, 0, + 2, 0x0000FFFF, 0x0000E4DB, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("ADDPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000580F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VADDPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000058, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("ADDPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000580F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VADDPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000058, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("ADDSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000580F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VADDSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000058, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("ADDSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000580F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VADDSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000058, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("ADDSUBPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D00F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VADDSUBPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000D0, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("ADDSUBPS"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000D00F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VADDSUBPS"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000D0, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("ANDPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000540F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VANDPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000054, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("ANDPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000540F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VANDPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000054, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("ANDNPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000550F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VANDNPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000055, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("ANDNPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000550F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VANDNPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000055, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("CMP*PD"), + D_SSE|D_POSTBYTE|D_MUST66|D_WILDCARD, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VCMP*PD"), + D_AVX|D_POSTBYTE|D_MUST66|D_WILDCARD, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("CMPPD"), + D_SSE|D_MUST66|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_CONST8, + B_NONE }, + + { T("VCMPPD"), + D_AVX|D_MUST66|D_SUSPICIOUS, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_CONST8 }, + + { T("CMP*PS"), + D_SSE|D_POSTBYTE|D_MUSTNONE|D_WILDCARD, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VCMP*PS"), + D_AVX|D_POSTBYTE|D_MUSTNONE|D_WILDCARD, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("CMPPS"), + D_SSE|D_MUSTNONE|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_CONST8, + B_NONE }, + + { T("VCMPPS"), + D_AVX|D_MUSTNONE|D_SUSPICIOUS, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_CONST8 }, + + { T("CMP*SD"), + D_SSE|D_POSTBYTE|D_MUSTF2|D_WILDCARD, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VCMP*SD"), + D_AVX|D_POSTBYTE|D_MUSTF2|D_WILDCARD, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("CMPSD"), + D_SSE|D_MUSTF2|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF64L|B_UPD, + B_SVEXF64L, + B_CONST8, + B_NONE }, + + { T("VCMPSD"), + D_AVX|D_MUSTF2|D_SUSPICIOUS, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_CONST8 }, + + { T("CMP*SS"), + D_SSE|D_POSTBYTE|D_MUSTF3|D_WILDCARD, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VCMP*SS"), + D_AVX|D_POSTBYTE|D_MUSTF3|D_WILDCARD, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("CMPSS"), + D_SSE|D_MUSTF3|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000C20F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_CONST8, + B_NONE }, + + { T("VCMPSS"), + D_AVX|D_MUSTF3|D_SUSPICIOUS, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x000000C2, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_CONST8 }, + + { T("COMISD"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x00002F0F, 0x00, + B_SREGF64L, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VCOMISD"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002F, 0x00, + B_SREGF64L, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("COMISS"), + D_SSE|D_MUSTNONE|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x00002F0F, 0x00, + B_SREGF32L, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VCOMISS"), + D_AVX|D_MUSTNONE|D_ALLFLAGS, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002F, 0x00, + B_SREGF32L, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("CVTDQ2PD"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000E60F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEI32x2L, + B_NONE, + B_NONE }, + + { T("VCVTDQ2PD"), + D_AVX|D_MUSTF3|D_REGISTER, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000E6, 0x00, + B_SREGF64x2|B_CHG, + B_SSEI32x2L|B_REGISTER|B_NOVEXSIZE|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("VCVTDQ2PD"), + D_AVX|D_MUSTF3|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000E6, 0x00, + B_SREGF64x2|B_CHG, + B_SSEI32x2L|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CVTDQ2PS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005B0F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VCVTDQ2PS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005B, 0x00, + B_SREGF32x4|B_CHG, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("CVTPD2DQ"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000E60F, 0x00, + B_SREGI32x2L|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VCVTPD2DQ"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000E6, 0x00, + B_SREGI32x2L|B_NOVEXSIZE|B_CHG, + B_SSEF64x2|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CVTPD2PI"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00002D0F, 0x00, + B_MREG32x2|B_SIGNED|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("CVTPD2PS"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005A0F, 0x00, + B_SREGF32x2L|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VCVTPD2PS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005A, 0x00, + B_SREGF32x2L|B_NOVEXSIZE|B_CHG, + B_SSEF64x2|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CVTPI2PD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00002A0F, 0x00, + B_SREGF64x2|B_CHG, + B_MMX32x2|B_SIGNED, + B_NONE, + B_NONE }, + + { T("CVTPI2PS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00002A0F, 0x00, + B_SREGF32x2L|B_CHG, + B_MMX32x2|B_SIGNED, + B_NONE, + B_NONE }, + + { T("CVTPS2DQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005B0F, 0x00, + B_SREGI32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VCVTPS2DQ"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005B, 0x00, + B_SREGI32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("CVTPS2PD"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005A0F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF32x2L, + B_NONE, + B_NONE }, + + { T("VCVTPS2PD"), + D_AVX|D_MUSTNONE|D_REGISTER, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005A, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF32x2L|B_REGISTER|B_NOVEXSIZE|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("VCVTPS2PD"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005A, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF32x2L|B_MEMORY|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CVTPS2PI"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00002D0F, 0x00, + B_MREG32x2|B_CHG, + B_SSEF32x2L, + B_NONE, + B_NONE }, + + { T("CVTSD2SI"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00002D0F, 0x00, + B_REG32|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VCVTSD2SI"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002D, 0x00, + B_REG32|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("CVTSD2SS"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00005A0F, 0x00, + B_SREGF32L|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VCVTSD2SS"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005A, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF64L, + B_NONE }, + + { T("CVTSI2SD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00002A0F, 0x00, + B_SREGF64L|B_CHG, + B_INT32|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VCVTSI2SD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000002A, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_INT32|B_SIGNED, + B_NONE }, + + { T("CVTSI2SS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00002A0F, 0x00, + B_SREGF32L|B_CHG, + B_INT32|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VCVTSI2SS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000002A, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_INT32|B_SIGNED, + B_NONE }, + + { T("CVTSS2SD"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005A0F, 0x00, + B_SREGF64L|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VCVTSS2SD"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005A, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF32L, + B_NONE }, + + { T("CVTSS2SI"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00002D0F, 0x00, + B_REG32|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VCVTSS2SI"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002D, 0x00, + B_REG32|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("CVTTPD2PI"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00002C0F, 0x00, + B_MREG32x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("CVTTPD2DQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E60F, 0x00, + B_SREGI32x2L|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VCVTTPD2DQ"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000E6, 0x00, + B_SREGI32x2L|B_NOVEXSIZE|B_CHG, + B_SSEF64x2|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CVTTPS2DQ"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005B0F, 0x00, + B_SREGI32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VCVTTPS2DQ"), + D_AVX|D_MUSTF3, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000005B, 0x00, + B_SREGI32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("CVTTPS2PI"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00002C0F, 0x00, + B_MREG32x2|B_CHG, + B_SSEF32x2L, + B_NONE, + B_NONE }, + + { T("CVTTSD2SI"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00002C0F, 0x00, + B_REG32|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VCVTTSD2SI"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002C, 0x00, + B_REG32|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("CVTTSS2SI"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00002C0F, 0x00, + B_REG32|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VCVTTSS2SI"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002C, 0x00, + B_REG32|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("DIVPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005E0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VDIVPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005E, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("DIVPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005E0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VDIVPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005E, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("DIVSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00005E0F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VDIVSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005E, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("DIVSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005E0F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VDIVSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005E, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("HADDPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00007C0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VHADDPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000007C, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("HADDPS"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00007C0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VHADDPS"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000007C, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("HSUBPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00007D0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VHSUBPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000007D, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("HSUBPS"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00007D0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VHSUBPS"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000007D, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("LDDQU"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000F00F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VLDDQU"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000F0, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("LDMXCSR"), + D_CMD|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0010AE0F, 0x00, + B_MXCSR|B_CHG|B_PSEUDO, + B_INT32|B_BINARY|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VLDMXCSR"), + D_CMD|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000038FF, 0x000010AE, 0x00, + B_MXCSR|B_CHG|B_PSEUDO, + B_INT32|B_BINARY|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VSTMXCSR"), + D_CMD|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000038FF, 0x000018AE, 0x00, + B_INT32|B_BINARY|B_MEMONLY|B_NOESP|B_SHOWSIZE|B_CHG, + B_MXCSR|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("MASKMOVDQU"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0F70F, 0x00, + B_SSEI8x16DI|B_UPD|B_PSEUDO, + B_SREGI8x16|B_BINARY, + B_SSEI8x16|B_REGISTER, + B_NONE }, + + { T("VMASKMOVDQU"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x0000C0FF, 0x0000C0F7, 0x00, + B_SSEI8x16DI|B_UPD|B_PSEUDO, + B_SREGI8x16|B_BINARY, + B_SSEI8x16|B_REGISTER, + B_NONE }, + + { T("MASKMOVQ"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0F70F, 0x00, + B_MMX8x8DI|B_UPD|B_PSEUDO, + B_MREG8x8, + B_MMX8x8|B_REGISTER, + B_NONE }, + + { T("MAXPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005F0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMAXPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005F, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("MAXPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005F0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMAXPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005F, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("MAXSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00005F0F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMAXSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005F, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("MAXSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005F0F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VMAXSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005F, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("MFENCE"), + D_SSE, 0, + 3, 0x00FFFFFF, 0x00F0AE0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("MINPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005D0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMINPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005D, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("MINPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005D0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMINPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005D, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("MINSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00005D0F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMINSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005D, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("MINSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005D0F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VMINSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005D, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("MOVAPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000280F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMOVAPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000028, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("MOVAPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000290F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVAPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000029, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVAPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000280F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMOVAPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000028, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("MOVAPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000290F, 0x00, + B_SSEF32x4|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("VMOVAPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000029, 0x00, + B_SSEF32x4|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("MOVD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00006E0F, 0x00, + B_MREG32x2|B_CHG, + B_INT32, + B_NONE, + B_NONE }, + + { T("MOVD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00007E0F, 0x00, + B_INT32|B_CHG, + B_MREG32x2, + B_NONE, + B_NONE }, + + { T("MOVD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006E0F, 0x00, + B_SREGI32x2L|B_CHG, + B_INT32, + B_NONE, + B_NONE }, + + { T("VMOVD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x0000006E, 0x00, + B_SREGI32x2L|B_CHG, + B_INT32, + B_NONE, + B_NONE }, + + { T("MOVD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00007E0F, 0x00, + B_INT32|B_CHG, + B_SREGI32L, + B_NONE, + B_NONE }, + + { T("VMOVD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x0000007E, 0x00, + B_INT32|B_CHG, + B_SREGI32L, + B_NONE, + B_NONE }, + + { T("MOVDDUP"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000120F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMOVDDUP"), + D_AVX|D_MUSTF2, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000012, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("MOVDQA"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006F0F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMOVDQA"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000006F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("MOVDQA"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00007F0F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVDQA"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000007F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVDQU"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00006F0F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMOVDQU"), + D_AVX|D_MUSTF3, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000006F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("MOVDQU"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00007F0F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVDQU"), + D_AVX|D_MUSTF3, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000007F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVDQ2Q"), + D_MMX|D_MUSTF2|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0D60F, 0x00, + B_MREG32x2|B_CHG, + B_SSEI32x2L|B_REGISTER, + B_NONE, + B_NONE }, + + { T("MOVHLPS"), + D_SSE|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0120F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4|B_REGISTER, + B_NONE, + B_NONE }, + + { T("VMOVHLPS"), + D_AVX|D_MUSTNONE|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000C0FF, 0x0000C012, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4|B_REGISTER, + B_NONE }, + + { T("MOVHPD"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000160F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VMOVHPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000016, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64L|B_MEMORY, + B_NONE }, + + { T("MOVHPD"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000170F, 0x00, + B_SSEF64L|B_MEMORY|B_UPD, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVHPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000017, 0x00, + B_SSEF64L|B_MEMORY|B_UPD, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVHPS"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000160F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x2L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VMOVHPS"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000016, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x2L|B_MEMORY, + B_NONE }, + + { T("MOVHPS"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000170F, 0x00, + B_SSEF32x2L|B_MEMORY|B_UPD, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("VMOVHPS"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000017, 0x00, + B_SSEF32x2L|B_MEMORY|B_UPD, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("MOVLHPS"), + D_SSE|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0160F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x2L|B_REGISTER, + B_NONE, + B_NONE }, + + { T("VMOVLHPS"), + D_AVX|D_MUSTNONE|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000C0FF, 0x0000C016, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x2L|B_REGISTER, + B_NONE }, + + { T("MOVLPD"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000120F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VMOVLPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000012, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64L|B_MEMORY, + B_NONE }, + + { T("MOVLPD"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000130F, 0x00, + B_SSEF64L|B_MEMORY|B_UPD, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("VMOVLPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000013, 0x00, + B_SSEF64L|B_MEMORY|B_UPD, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("MOVLPS"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000120F, 0x00, + B_SREGF32x2L|B_UPD, + B_SSEF32x2L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VMOVLPS"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000012, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x2L|B_MEMORY, + B_NONE }, + + { T("MOVLPS"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000130F, 0x00, + B_SSEF32x2L|B_MEMORY|B_UPD, + B_SREGF32x2L, + B_NONE, + B_NONE }, + + { T("VMOVLPS"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000013, 0x00, + B_SSEF32x2L|B_MEMORY|B_UPD, + B_SREGF32x2L, + B_NONE, + B_NONE }, + + { T("MOVMSKPD"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0500F, 0x00, + B_REG32|B_CHG, + B_SSEF64x2|B_REGONLY, + B_NONE, + B_NONE }, + + { T("VMOVMSKPD"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x0000C0FF, 0x0000C050, 0x00, + B_REG32|B_CHG, + B_SSEF64x2|B_REGONLY, + B_NONE, + B_NONE }, + + { T("MOVMSKPS"), + D_SSE|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0500F, 0x00, + B_REG32|B_CHG, + B_SSEF32x4|B_REGONLY, + B_NONE, + B_NONE }, + + { T("VMOVMSKPS"), + D_AVX|D_MUSTNONE|D_REGISTER, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x0000C0FF, 0x0000C050, 0x00, + B_REG32|B_CHG, + B_SSEF32x4|B_REGONLY, + B_NONE, + B_NONE }, + + { T("MOVNTDQ"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000E70F, 0x00, + B_SSEI8x16|B_MEMORY|B_CHG, + B_SREGI8x16|B_BINARY, + B_NONE, + B_NONE }, + + { T("VMOVNTDQ"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x000000E7, 0x00, + B_SSEI8x16|B_MEMORY|B_CHG, + B_SREGI8x16|B_BINARY, + B_NONE, + B_NONE }, + + { T("MOVNTI"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000C30F, 0x00, + B_INT32|B_MEMORY|B_CHG, + B_REG32, + B_NONE, + B_NONE }, + + { T("MOVNTPD"), + D_SSE|D_MUST66|D_MEMORY, 0, + 2, 0x0000FFFF, 0x00002B0F, 0x00, + B_SSEF64x2|B_MEMORY|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVNTPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000002B, 0x00, + B_SSEF64x2|B_MEMORY|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVNTPS"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x00002B0F, 0x00, + B_SSEF32x4|B_MEMORY|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("VMOVNTPS"), + D_AVX|D_MUSTNONE|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x0000002B, 0x00, + B_SSEF32x4|B_MEMORY|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("MOVNTQ"), + D_MMX|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0000FFFF, 0x0000E70F, 0x00, + B_MMX64|B_MEMORY|B_CHG, + B_MREG64, + B_NONE, + B_NONE }, + + { T("MOVQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00006F0F, 0x00, + B_MREG64|B_CHG, + B_MMX64, + B_NONE, + B_NONE }, + + { T("MOVQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00007F0F, 0x00, + B_MMX64|B_CHG, + B_MREG64, + B_NONE, + B_NONE }, + + { T("MOVQ"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00007E0F, 0x00, + B_SREGF64L|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMOVQ"), + D_AVX|D_MUSTF3, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x0000007E, 0x00, + B_SREGF64L|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("MOVQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D60F, 0x00, + B_SSEF64L|B_CHG, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("VMOVQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x000000D6, 0x00, + B_SSEF64L|B_CHG, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("MOVQ2DQ"), + D_MMX|D_MUSTF3|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0D60F, 0x00, + B_SREGF64L|B_UPD, + B_MMX8x8|B_REGISTER, + B_NONE, + B_NONE }, + + { T("MOVSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000100F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMOVSD"), + D_AVX|D_MUSTF2|D_MEMORY, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMOVSD"), + D_AVX|D_MUSTF2|D_REGISTER, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF64L|B_UPD, + B_SVEXF64x2, + B_SSEF64L, + B_NONE }, + + { T("MOVSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000110F, 0x00, + B_SSEF64L|B_UPD, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("VMOVSD"), + D_AVX|D_MUSTF2|D_MEMORY, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF64L|B_UPD, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("VMOVSD"), + D_AVX|D_MUSTF2|D_REGISTER, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF64L|B_UPD, + B_SVEXF64x2, + B_SREGF64L, + B_NONE }, + + { T("MOVSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000100F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VMOVSS"), + D_AVX|D_MUSTF3|D_MEMORY, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VMOVSS"), + D_AVX|D_MUSTF3|D_REGISTER, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF32L|B_UPD, + B_SVEXF32x4, + B_SSEF32L, + B_NONE }, + + { T("MOVSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000110F, 0x00, + B_SSEF32L|B_UPD, + B_SREGF32L, + B_NONE, + B_NONE }, + + { T("VMOVSS"), + D_AVX|D_MUSTF3|D_MEMORY, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF32L|B_UPD, + B_SREGF32L, + B_NONE, + B_NONE }, + + { T("VMOVSS"), + D_AVX|D_MUSTF3|D_REGISTER, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF32L|B_UPD, + B_SVEXF32x4, + B_SREGF32L, + B_NONE }, + + { T("MOVSHDUP"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000160F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMOVSHDUP"), + D_AVX|D_MUSTF3, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000016, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("MOVSLDUP"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000120F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMOVSLDUP"), + D_AVX|D_MUSTF3, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000012, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("MOVUPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000100F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMOVUPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("MOVUPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000110F, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("VMOVUPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF64x2|B_CHG, + B_SREGF64x2, + B_NONE, + B_NONE }, + + { T("MOVUPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000100F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMOVUPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000010, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("MOVUPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000110F, 0x00, + B_SSEF32x4|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("VMOVUPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000011, 0x00, + B_SSEF32x4|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("MULPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000590F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VMULPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000059, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("MULPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000590F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VMULPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000059, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("MULSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000590F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VMULSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000059, 0x00, + B_SREGF64L|B_UPD, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("MULSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000590F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VMULSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000059, 0x00, + B_SREGF32L|B_UPD, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("ORPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000560F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VORPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000056, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("ORPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000560F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VORPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000056, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("PACKSSWB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000630F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PACKSSWB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000630F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPACKSSWB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000063, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PACKSSDW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00006B0F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PACKSSDW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006B0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPACKSSDW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x0000006B, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PACKUSWB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000670F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PACKUSWB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000670F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPACKUSWB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000067, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PADDB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000FC0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PADDW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000FD0F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PADDD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000FE0F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PADDB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000FC0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPADDB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000FC, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PADDW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000FD0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPADDW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000FD, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PADDD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000FE0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPADDD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000FE, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PADDQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D40F, 0x00, + B_MREG64|B_UPD, + B_MMX64, + B_NONE, + B_NONE }, + + { T("PADDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D40F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPADDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D4, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PADDSB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000EC0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PADDSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000ED0F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PADDSB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000EC0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPADDSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000EC, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PADDSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000ED0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPADDSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000ED, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PADDUSB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DC0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PADDUSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DD0F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PADDUSB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DC0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPADDUSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DC, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PADDUSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DD0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPADDUSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DD, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PAND"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DB0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PAND"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DB0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPAND"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DB, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PANDN"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DF0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PANDN"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DF0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPANDN"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DF, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PAVGB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E00F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PAVGW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E30F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PAVGB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E00F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPAVGB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E0, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PAVGW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E30F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPAVGW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E3, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PCMPEQB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000740F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PCMPEQW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000750F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PCMPEQD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000760F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PCMPEQB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000740F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPCMPEQB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000074, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PCMPEQW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000750F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPCMPEQW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000075, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PCMPEQD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000760F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPCMPEQD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000076, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PCMPGTB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000640F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PCMPGTW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000650F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PCMPGTD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000660F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PCMPGTB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000640F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPCMPGTB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000064, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PCMPGTW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000650F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPCMPGTW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000065, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PCMPGTD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000660F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPCMPGTD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000066, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PEXTRW"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0C50F, 0x00, + B_REG32|B_CHG, + B_MMX16x4|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PEXTRW"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0C50F, 0x00, + B_REG32|B_CHG, + B_SSEI16x8|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("VPEXTRW"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x0000C0FF, 0x0000C0C5, 0x00, + B_REG32|B_CHG, + B_SSEI16x8|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PINSRW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000C40F, 0x00, + B_MREG16x4|B_UPD, + B_INT16, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PINSRW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x00C0FFFF, 0x00C0C40F, 0x00, + B_MREG16x4|B_UPD, + B_INT32|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PINSRW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000C40F, 0x00, + B_SREGI16x8|B_UPD, + B_INT16, + B_CONST8|B_COUNT, + B_NONE }, + + { T("VPINSRW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000C4, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_INT16, + B_CONST8|B_COUNT }, + + { T("PINSRW"), + D_SSE|D_MUST66, 0, + 2, 0x00C0FFFF, 0x00C0C40F, 0x00, + B_SREGI16x8|B_UPD, + B_INT32|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("VPINSRW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x0000C0FF, 0x0000C0C4, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_INT32|B_REGISTER, + B_CONST8|B_COUNT }, + + { T("PMADDWD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F50F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMADDWD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F50F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMADDWD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F5, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMAXSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000EE0F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMAXSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000EE0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMAXSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000EE, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMAXUB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DE0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PMAXUB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DE0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPMAXUB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DE, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PMINSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000EA0F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMINSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000EA0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMINSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000EA, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMINUB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000DA0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PMINUB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000DA0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPMINUB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000DA, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PMOVMSKB"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0D70F, 0x00, + B_REG32|B_CHG, + B_MMX8x8|B_REGISTER, + B_NONE, + B_NONE }, + + { T("PMOVMSKB"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00C0FFFF, 0x00C0D70F, 0x00, + B_REG32|B_CHG, + B_SSEI8x16|B_REGISTER, + B_NONE, + B_NONE }, + + { T("VPMOVMSKB"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x0000C0FF, 0x0000C0D7, 0x00, + B_REG32|B_CHG, + B_SSEI8x16|B_REGISTER, + B_NONE, + B_NONE }, + + { T("PMULHUW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E40F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMULHUW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E40F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMULHUW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E4, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMULHW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E50F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMULHW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E50F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMULHW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E5, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMULLW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D50F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMULLW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D50F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMULLW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D5, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMULUDQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F40F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PMULUDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F40F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPMULUDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F4, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("POR"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000EB0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("POR"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000EB0F, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPOR"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000EB, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SVEXI8x16|B_BINARY, + B_SSEI8x16, + B_NONE }, + + { T("PSADBW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F60F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PSADBW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F60F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPSADBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F6, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PSHUFD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000700F, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPSHUFD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000070, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PSHUFHW"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000700F, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPSHUFHW"), + D_AVX|D_MUSTF3, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000070, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PSHUFLW"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000700F, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPSHUFLW"), + D_AVX|D_MUSTF2, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000070, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PSHUFW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000700F, 0x00, + B_MREG16x4|B_CHG, + B_MMX16x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PSLLDQ"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F8730F, 0x00, + B_SSEI8x16|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSLLDQ"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000F873, 0x00, + B_SVEXI8x16|B_UPD, + B_SSEI8x16|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSLLW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F10F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSLLW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F10F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSLLW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F1, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSLLW"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0710F, 0x00, + B_MMX16x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSLLW"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0710F, 0x00, + B_SSEI16x8|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSLLW"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000F071, 0x00, + B_SVEXI16x8|B_UPD, + B_SSEI16x8|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSLLD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F20F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PSLLD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F20F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPSLLD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F2, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PSLLD"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0720F, 0x00, + B_MMX32x2|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSLLD"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0720F, 0x00, + B_SSEI32x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSLLD"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000F072, 0x00, + B_SVEXI32x4|B_UPD, + B_SSEI32x4|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSLLQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F30F, 0x00, + B_MREG64|B_UPD, + B_MMX64, + B_NONE, + B_NONE }, + + { T("PSLLQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F30F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPSLLQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F3, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PSLLQ"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0730F, 0x00, + B_MMX64|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSLLQ"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00F0730F, 0x00, + B_SSEI64x2|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSLLQ"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000F073, 0x00, + B_SVEXI64x2|B_UPD, + B_SSEI64x2|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRAW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E10F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSRAW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E10F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSRAW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E1, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSRAW"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00E0710F, 0x00, + B_MMX16x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSRAW"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00E0710F, 0x00, + B_SSEI16x8|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRAW"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000E071, 0x00, + B_SVEXI16x8|B_UPD, + B_SSEI16x8|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRAD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E20F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PSRAD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E20F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPSRAD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E2, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PSRAD"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00E0720F, 0x00, + B_MMX32x2|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSRAD"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00E0720F, 0x00, + B_SSEI32x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRAD"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000E072, 0x00, + B_SVEXI32x4|B_UPD, + B_SSEI32x4|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRLDQ"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D8730F, 0x00, + B_SSEI8x16|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRLDQ"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000D873, 0x00, + B_SVEXI8x16|B_UPD, + B_SSEI8x16|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRLW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D10F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSRLW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D10F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSRLW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D1, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSRLW"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0710F, 0x00, + B_MMX16x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSRLW"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0710F, 0x00, + B_SSEI16x8|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRLW"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000D071, 0x00, + B_SVEXI16x8|B_UPD, + B_SSEI16x8|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRLD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D20F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PSRLD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D20F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPSRLD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D2, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PSRLD"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0720F, 0x00, + B_MMX32x2|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSRLD"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0720F, 0x00, + B_SSEI32x4|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRLD"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000D072, 0x00, + B_SVEXI32x4|B_UPD, + B_SSEI32x4|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSRLQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D30F, 0x00, + B_MREG64|B_UPD, + B_MMX64, + B_NONE, + B_NONE }, + + { T("PSRLQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D30F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPSRLQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D3, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PSRLQ"), + D_MMX|D_MUSTNONE|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0730F, 0x00, + B_MMX64|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("PSRLQ"), + D_SSE|D_MUST66|D_REGISTER, 0, + 2, 0x00F8FFFF, 0x00D0730F, 0x00, + B_SSEI64x2|B_REGISTER|B_UPD, + B_CONST8|B_COUNT, + B_NONE, + B_NONE }, + + { T("VPSRLQ"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT, + 1, 0x0000F8FF, 0x0000D073, 0x00, + B_SVEXI64x2|B_UPD, + B_SSEI64x2|B_REGISTER, + B_CONST8|B_COUNT, + B_NONE }, + + { T("PSUBB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F80F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PSUBW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000F90F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSUBD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000FA0F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PSUBB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F80F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPSUBB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F8, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PSUBW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000F90F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSUBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000F9, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSUBD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000FA0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPSUBD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000FA, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PSUBQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000FB0F, 0x00, + B_MREG64|B_UPD, + B_MMX64, + B_NONE, + B_NONE }, + + { T("PSUBQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000FB0F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPSUBQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000FB, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PSUBSB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E80F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PSUBSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000E90F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSUBSB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E80F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPSUBSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E8, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PSUBSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000E90F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSUBSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000E9, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSUBUSB"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D80F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PSUBUSW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000D90F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSUBUSB"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D80F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPSUBUSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D8, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PSUBUSW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000D90F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPSUBUSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000D9, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PUNPCKHBW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000680F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PUNPCKHBW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000680F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPUNPCKHBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000068, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PUNPCKHWD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000690F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PUNPCKHWD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000690F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPUNPCKHWD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000069, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PUNPCKHDQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00006A0F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PUNPCKHDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006A0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPUNPCKHDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x0000006A, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PUNPCKHQDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006D0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPUNPCKHQDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x0000006D, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PUNPCKLBW"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000600F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PUNPCKLBW"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000600F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPUNPCKLBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000060, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("PUNPCKLWD"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000610F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PUNPCKLWD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000610F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPUNPCKLWD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000061, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PUNPCKLDQ"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000620F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PUNPCKLDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000620F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPUNPCKLDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x00000062, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PUNPCKLQDQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00006C0F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPUNPCKLQDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x0000006C, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PXOR"), + D_MMX|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000EF0F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PXOR"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000EF0F, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VPXOR"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT, + 1, 0x000000FF, 0x000000EF, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SVEXI8x16|B_BINARY, + B_SSEI8x16, + B_NONE }, + + { T("RCPPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000530F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VRCPPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000053, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("RCPSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000530F, 0x00, + B_SREGF32L|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VRCPSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000053, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L|B_CHG, + B_SSEF32L, + B_NONE }, + + { T("RSQRTPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000520F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VRSQRTPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000052, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("RSQRTSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000520F, 0x00, + B_SREGF32L|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VRSQRTSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000052, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("SHUFPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000C60F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VSHUFPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C6, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_CONST8|B_BINARY }, + + { T("SHUFPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000C60F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VSHUFPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x000000C6, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_CONST8|B_BINARY }, + + { T("SQRTPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000510F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VSQRTPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000051, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("SQRTPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000510F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VSQRTPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH|DX_NOVREG, + 1, 0x000000FF, 0x00000051, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("SQRTSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000510F, 0x00, + B_SREGF64L|B_CHG, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VSQRTSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000051, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("SQRTSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x0000510F, 0x00, + B_SREGF32L|B_CHG, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VSQRTSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x00000051, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("SUBPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x00005C0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VSUBPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005C, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("SUBPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00005C0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VSUBPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x0000005C, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("SUBSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00005C0F, 0x00, + B_SREGF64L|B_UPD, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VSUBSD"), + D_AVX|D_MUSTF2, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005C, 0x00, + B_SREGF64L|B_UPD, + B_SVEXF64L, + B_SSEF64L, + B_NONE }, + + { T("SUBSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00005C0F, 0x00, + B_SREGF32L|B_UPD, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VSUBSS"), + D_AVX|D_MUSTF3, DX_VEX|DX_IGNOREL, + 1, 0x000000FF, 0x0000005C, 0x00, + B_SREGF32L|B_UPD, + B_SVEXF32L, + B_SSEF32L, + B_NONE }, + + { T("UNPCKHPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000150F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VUNPCKHPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000015, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("UNPCKHPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000150F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VUNPCKHPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000015, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("UNPCKLPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000140F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VUNPCKLPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000014, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("UNPCKLPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000140F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VUNPCKLPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000014, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("UCOMISD"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x00002E0F, 0x00, + B_SREGF64L, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("VUCOMISD"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002E, 0x00, + B_SREGF64L, + B_SSEF64L, + B_NONE, + B_NONE }, + + { T("UCOMISS"), + D_SSE|D_MUSTNONE|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x00002E0F, 0x00, + B_SREGF32L, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("VUCOMISS"), + D_AVX|D_MUSTNONE|D_ALLFLAGS, DX_VEX|DX_IGNOREL|DX_NOVREG, + 1, 0x000000FF, 0x0000002E, 0x00, + B_SREGF32L, + B_SSEF32L, + B_NONE, + B_NONE }, + + { T("XORPD"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000570F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VXORPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000057, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_NONE }, + + { T("XORPS"), + D_SSE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x0000570F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VXORPS"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LBOTH, + 1, 0x000000FF, 0x00000057, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_NONE }, + + { T("FXRSTOR"), + D_SSE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0008AE0F, 0x00, + B_LONGDATA|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("FXSAVE"), + D_SSE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0000AE0F, 0x00, + B_LONGDATA|B_MEMORY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("LFENCE"), + D_SSE, 0, + 3, 0x00FFFFFF, 0x00E8AE0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCHT0"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0008180F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCHT1"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0010180F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCHT2"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0018180F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCHNTA"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x0000180F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("NOP"), + D_SSE|D_MUSTNONE|D_MEMORY|D_UNDOC, DX_NOP, + 2, 0x0020FFFF, 0x0020180F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCH"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x00000D0F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("PREFETCHW"), + D_SSE|D_MUSTNONE|D_MEMORY, 0, + 2, 0x0038FFFF, 0x00080D0F, 0x00, + B_ANYMEM|B_MEMORY, + B_NONE, + B_NONE, + B_NONE }, + + { T("SFENCE"), + D_SSE, 0, + 3, 0x00FFFFFF, 0x00F8AE0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("BLENDPD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000D3A0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VBLENDPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_LEAD3A, + 1, 0x000000FF, 0x0000000D, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_CONST8|B_BINARY }, + + { T("BLENDPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000C3A0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VBLENDPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_LEAD3A, + 1, 0x000000FF, 0x0000000C, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_CONST8|B_BINARY }, + + { T("BLENDVPD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0015380F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_XMM0I64x2, + B_NONE }, + + { T("BLENDVPD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0015380F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_XMM0I64x2|B_PSEUDO, + B_NONE }, + + { T("VBLENDVPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x0000004B, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_SIMMI8x16 }, + + { T("BLENDVPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0014380F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_XMM0I32x4, + B_NONE }, + + { T("BLENDVPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0014380F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_XMM0I32x4|B_PSEUDO, + B_NONE }, + + { T("VBLENDVPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x0000004A, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_SIMMI8x16 }, + + { T("CRC32"), + D_CMD|D_NEEDF2, 0, + 3, 0x00FFFFFF, 0x00F0380F, 0x00, + B_REG32|B_NOADDR|B_UPD, + B_INT8|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("CRC32"), + D_CMD|D_NEEDF2, 0, + 3, 0x00FFFFFF, 0x00F1380F, 0x00, + B_REG32|B_NOADDR|B_UPD, + B_INT1632|B_NOADDR|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("DPPD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00413A0F, 0x00, + B_SREGF64x2|B_UPD, + B_SSEF64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VDPPD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000041, 0x00, + B_SREGF64x2|B_UPD, + B_SVEXF64x2, + B_SSEF64x2, + B_CONST8|B_BINARY }, + + { T("DPPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00403A0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VDPPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_LEAD3A, + 1, 0x000000FF, 0x00000040, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32x4, + B_CONST8|B_BINARY }, + + { T("EXTRACTPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00173A0F, 0x00, + B_INT32|B_CHG, + B_SREGF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VEXTRACTPS"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000017, 0x00, + B_INT32|B_CHG, + B_SREGF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("INSERTPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00213A0F, 0x00, + B_SREGF32x4|B_UPD, + B_SSEF32L, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VINSERTPS"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000021, 0x00, + B_SREGF32x4|B_UPD, + B_SVEXF32x4, + B_SSEF32L, + B_CONST8|B_BINARY }, + + { T("MOVNTDQA"), + D_SSE|D_MUST66|D_MEMORY, 0, + 3, 0x00FFFFFF, 0x002A380F, 0x00, + B_SREGI8x16|B_BINARY|B_CHG, + B_SSEI8x16|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VMOVNTDQA"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x0000002A, 0x00, + B_SREGI8x16|B_BINARY|B_CHG, + B_SSEI8x16|B_MEMORY, + B_NONE, + B_NONE }, + + { T("MPSADBW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00423A0F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VMPSADBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000042, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY }, + + { T("PACKUSDW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x002B380F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPACKUSDW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000002B, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4|B_UPD, + B_SSEI32x4, + B_NONE }, + + { T("PBLENDVB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0010380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_XMM0I8x16, + B_NONE }, + + { T("PBLENDVB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0010380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_XMM0I8x16|B_PSEUDO, + B_NONE }, + + { T("VPBLENDVB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x0000004C, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16, + B_SIMMI8x16 }, + + { T("PBLENDW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000E3A0F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPBLENDW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x0000000E, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_CONST8|B_BINARY }, + + { T("PCLMULLQLQDQ"), + D_SSE|D_POSTBYTE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00443A0F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCLMULLQLQDQ"), + D_AVX|D_POSTBYTE|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000044, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PCLMULHQLQDQ"), + D_SSE|D_POSTBYTE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00443A0F, 0x01, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCLMULHQLQDQ"), + D_AVX|D_POSTBYTE|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000044, 0x01, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PCLMULLQHDQ"), + D_SSE|D_POSTBYTE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00443A0F, 0x10, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCLMULLQHDQ"), + D_AVX|D_POSTBYTE|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000044, 0x10, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PCLMULHQHDQ"), + D_SSE|D_POSTBYTE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00443A0F, 0x11, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCLMULHQHDQ"), + D_AVX|D_POSTBYTE|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000044, 0x11, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PCLMULQDQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00443A0F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPCLMULQDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x00000044, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_CONST8|B_BINARY }, + + { T("PCMPEQQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0029380F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCMPEQQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000029, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PCMPESTRI"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 3, 0x00FFFFFF, 0x00613A0F, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPCMPESTRI"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000061, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PCMPESTRM"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 3, 0x00FFFFFF, 0x00603A0F, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPCMPESTRM"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000060, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PCMPISTRI"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 3, 0x00FFFFFF, 0x00633A0F, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPCMPISTRI"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000063, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PCMPISTRM"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 3, 0x00FFFFFF, 0x00623A0F, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPCMPISTRM"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000062, 0x00, + B_SREGI8x16, + B_SSEI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PCMPGTQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0037380F, 0x00, + B_SREGI64x2|B_UPD, + B_SSEI64x2, + B_NONE, + B_NONE }, + + { T("VPCMPGTQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000037, 0x00, + B_SREGI64x2|B_UPD, + B_SVEXI64x2, + B_SSEI64x2, + B_NONE }, + + { T("PEXTRB"), + D_SSE|D_MUST66|D_MEMORY, 0, + 3, 0x00FFFFFF, 0x00143A0F, 0x00, + B_INT8|B_MEMORY|B_CHG, + B_SREGI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PEXTRB"), + D_SSE|D_MUST66|D_REGISTER, 0, + 3, 0x00FFFFFF, 0x00143A0F, 0x00, + B_INT32|B_REGISTER|B_CHG, + B_SREGI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPEXTRB"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000014, 0x00, + B_INT8|B_MEMORY|B_CHG, + B_SREGI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPEXTRB"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000014, 0x00, + B_INT32|B_REGISTER|B_CHG, + B_SREGI8x16, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PEXTRD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00163A0F, 0x00, + B_INT32|B_CHG, + B_SREGI32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPEXTRD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000016, 0x00, + B_INT32|B_CHG, + B_SREGI32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PEXTRW"), + D_SSE|D_MUST66|D_MEMORY, 0, + 3, 0x00FFFFFF, 0x00153A0F, 0x00, + B_INT16|B_MEMORY|B_CHG, + B_SREGI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PEXTRW"), + D_SSE|D_MUST66|D_REGISTER, 0, + 3, 0x00FFFFFF, 0x00153A0F, 0x00, + B_INT32|B_REGISTER|B_CHG, + B_SREGI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPEXTRW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000015, 0x00, + B_INT16|B_CHG, + B_SREGI16x8, + B_CONST8|B_BINARY, + B_NONE }, + + { T("PHMINPOSUW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0041380F, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPHMINPOSUW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000041, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("PINSRB"), + D_SSE|D_MUST66|D_MEMORY, 0, + 3, 0x00FFFFFF, 0x00203A0F, 0x00, + B_SREGI8x16|B_UPD, + B_INT8|B_MEMORY, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPINSRB"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LSHORT|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000020, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_INT8|B_MEMORY, + B_CONST8|B_BINARY }, + + { T("PINSRB"), + D_SSE|D_MUST66|D_REGISTER, 0, + 3, 0x00FFFFFF, 0x00203A0F, 0x00, + B_SREGI8x16|B_UPD, + B_INT32|B_REGISTER, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPINSRB"), + D_AVX|D_MUST66|D_REGISTER, DX_VEX|DX_LSHORT|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000020, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_INT32|B_REGISTER, + B_CONST8|B_BINARY }, + + { T("PINSRD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00223A0F, 0x00, + B_SREGI32x4|B_UPD, + B_INT32, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VPINSRD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000022, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_INT32, + B_CONST8|B_BINARY }, + + { T("PMAXSB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003C380F, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMAXSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003C, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SVEXI8x16|B_SIGNED, + B_SSEI8x16|B_SIGNED, + B_NONE }, + + { T("PMAXSD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003D380F, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMAXSD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003D, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SVEXI32x4|B_SIGNED, + B_SSEI32x4|B_SIGNED, + B_NONE }, + + { T("PMAXUD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003F380F, 0x00, + B_SREGI32x4|B_UNSIGNED|B_UPD, + B_SSEI32x4|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("VPMAXUD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003F, 0x00, + B_SREGI32x4|B_UNSIGNED|B_UPD, + B_SVEXI32x4|B_UNSIGNED, + B_SSEI32x4|B_UNSIGNED, + B_NONE }, + + { T("PMAXUW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003E380F, 0x00, + B_SREGI16x8|B_UNSIGNED|B_UPD, + B_SSEI16x8|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("VPMAXUW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003E, 0x00, + B_SREGI16x8|B_UNSIGNED|B_UPD, + B_SVEXI16x8|B_UNSIGNED, + B_SSEI16x8|B_UNSIGNED, + B_NONE }, + + { T("PMINSB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0038380F, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMINSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000038, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SVEXI8x16|B_SIGNED, + B_SSEI8x16|B_SIGNED, + B_NONE }, + + { T("PMINSD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0039380F, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMINSD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000039, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SVEXI32x4|B_SIGNED, + B_SSEI32x4|B_SIGNED, + B_NONE }, + + { T("PMINUD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003B380F, 0x00, + B_SREGI32x4|B_UNSIGNED|B_UPD, + B_SSEI32x4|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("VPMINUD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003B, 0x00, + B_SREGI32x4|B_UNSIGNED|B_UPD, + B_SVEXI32x4|B_UNSIGNED, + B_SSEI32x4|B_UNSIGNED, + B_NONE }, + + { T("PMINUW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x003A380F, 0x00, + B_SREGI16x8|B_UNSIGNED|B_UPD, + B_SSEI16x8|B_UNSIGNED, + B_NONE, + B_NONE }, + + { T("VPMINUW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000003A, 0x00, + B_SREGI16x8|B_UNSIGNED|B_UPD, + B_SVEXI16x8|B_UNSIGNED, + B_SSEI16x8|B_UNSIGNED, + B_NONE }, + + { T("PMOVSXBW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0020380F, 0x00, + B_SREGI16x8|B_SIGNED|B_CHG, + B_SSEI8x8L, + B_NONE, + B_NONE }, + + { T("VPMOVSXBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000020, 0x00, + B_SREGI16x8|B_SIGNED|B_CHG, + B_SSEI8x8L, + B_NONE, + B_NONE }, + + { T("PMOVSXBD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0021380F, 0x00, + B_SREGI32x4|B_SIGNED|B_CHG, + B_SSEI8x4L, + B_NONE, + B_NONE }, + + { T("VPMOVSXBD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000021, 0x00, + B_SREGI32x4|B_SIGNED|B_CHG, + B_SSEI8x4L, + B_NONE, + B_NONE }, + + { T("PMOVSXBQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0022380F, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI8x2L, + B_NONE, + B_NONE }, + + { T("VPMOVSXBQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000022, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI8x2L, + B_NONE, + B_NONE }, + + { T("PMOVSXWD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0023380F, 0x00, + B_SREGI32x4|B_SIGNED|B_CHG, + B_SSEI16x4L, + B_NONE, + B_NONE }, + + { T("VPMOVSXWD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000023, 0x00, + B_SREGI32x4|B_SIGNED|B_CHG, + B_SSEI16x4L, + B_NONE, + B_NONE }, + + { T("PMOVSXWQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0024380F, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI16x2L, + B_NONE, + B_NONE }, + + { T("VPMOVSXWQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000024, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI16x2L, + B_NONE, + B_NONE }, + + { T("PMOVSXDQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0025380F, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI32x2L, + B_NONE, + B_NONE }, + + { T("VPMOVSXDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000025, 0x00, + B_SREGI64x2|B_SIGNED|B_CHG, + B_SSEI32x2L, + B_NONE, + B_NONE }, + + { T("PMOVZXBW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0030380F, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI8x8L, + B_NONE, + B_NONE }, + + { T("VPMOVZXBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000030, 0x00, + B_SREGI16x8|B_CHG, + B_SSEI8x8L, + B_NONE, + B_NONE }, + + { T("PMOVZXBD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0031380F, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI8x4L, + B_NONE, + B_NONE }, + + { T("VPMOVZXBD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000031, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI8x4L, + B_NONE, + B_NONE }, + + { T("PMOVZXBQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0032380F, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI8x2L, + B_NONE, + B_NONE }, + + { T("VPMOVZXBQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000032, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI8x2L, + B_NONE, + B_NONE }, + + { T("PMOVZXWD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0033380F, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI16x4L, + B_NONE, + B_NONE }, + + { T("VPMOVZXWD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000033, 0x00, + B_SREGI32x4|B_CHG, + B_SSEI16x4L, + B_NONE, + B_NONE }, + + { T("PMOVZXWQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0034380F, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI16x2L, + B_NONE, + B_NONE }, + + { T("VPMOVZXWQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000034, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI16x2L, + B_NONE, + B_NONE }, + + { T("PMOVZXDQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0035380F, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI32x2L, + B_NONE, + B_NONE }, + + { T("VPMOVZXDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000035, 0x00, + B_SREGI64x2|B_CHG, + B_SSEI32x2L, + B_NONE, + B_NONE }, + + { T("PMULDQ"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0028380F, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMULDQ"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000028, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SVEXI32x4|B_SIGNED, + B_SSEI32x4|B_SIGNED, + B_NONE }, + + { T("PMULLD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0040380F, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMULLD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000040, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SVEXI32x4|B_SIGNED, + B_SSEI32x4|B_SIGNED, + B_NONE }, + + { T("PTEST"), + D_SSE|D_MUST66|D_ALLFLAGS, 0, + 3, 0x00FFFFFF, 0x0017380F, 0x00, + B_SREGI32x4, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPTEST"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LBOTH|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x00000017, 0x00, + B_SREGI32x4, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("ROUNDPD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00093A0F, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VROUNDPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000009, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_CONST8|B_BINARY, + B_NONE }, + + { T("ROUNDPS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00083A0F, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VROUNDPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x00000008, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_CONST8|B_BINARY, + B_NONE }, + + { T("ROUNDSD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000B3A0F, 0x00, + B_SREGF64L|B_CHG, + B_SSEF64L, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VROUNDSD"), + D_AVX|D_MUST66, DX_VEX|DX_IGNOREL|DX_LEAD3A, + 1, 0x000000FF, 0x0000000B, 0x00, + B_SREGF64L|B_CHG, + B_SVEXF64L, + B_SSEF64L, + B_CONST8|B_BINARY }, + + { T("ROUNDSS"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000A3A0F, 0x00, + B_SREGF32L|B_CHG, + B_SSEF32L, + B_CONST8|B_BINARY, + B_NONE }, + + { T("VROUNDSS"), + D_AVX|D_MUST66, DX_VEX|DX_IGNOREL|DX_LEAD3A, + 1, 0x000000FF, 0x0000000A, 0x00, + B_SREGF32L|B_CHG, + B_SVEXF32L, + B_SSEF32L, + B_CONST8|B_BINARY }, + + { T("PABSB"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x001C380F, 0x00, + B_MREG8x8|B_UNSIGNED|B_CHG, + B_MMX8x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PABSB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x001C380F, 0x00, + B_SREGI8x16|B_UNSIGNED|B_CHG, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPABSB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x0000001C, 0x00, + B_SREGI8x16|B_UNSIGNED|B_CHG, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PABSW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x001D380F, 0x00, + B_MREG16x4|B_UNSIGNED|B_CHG, + B_MMX16x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PABSW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x001D380F, 0x00, + B_SREGI16x8|B_UNSIGNED|B_CHG, + B_SSEI16x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPABSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x0000001D, 0x00, + B_SREGI16x8|B_UNSIGNED|B_CHG, + B_SSEI16x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PABSD"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x001E380F, 0x00, + B_MREG32x2|B_UNSIGNED|B_CHG, + B_MMX32x2|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PABSD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x001E380F, 0x00, + B_SREGI32x4|B_UNSIGNED|B_CHG, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPABSD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x0000001E, 0x00, + B_SREGI32x4|B_UNSIGNED|B_CHG, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PALIGNR"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x000F3A0F, 0x00, + B_MREG8x8|B_BINARY|B_UPD, + B_MMX8x8|B_BINARY, + B_CONST8|B_UNSIGNED, + B_NONE }, + + { T("PALIGNR"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000F3A0F, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SSEI8x16|B_BINARY, + B_CONST8|B_UNSIGNED, + B_NONE }, + + { T("VPALIGNR"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD3A, + 1, 0x000000FF, 0x0000000F, 0x00, + B_SREGI8x16|B_BINARY|B_UPD, + B_SVEXI8x16|B_BINARY, + B_SSEI8x16|B_BINARY, + B_CONST8|B_UNSIGNED }, + + { T("PHADDW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0001380F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PHADDW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0001380F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPHADDW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000001, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PHADDD"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0002380F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PHADDD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0002380F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPHADDD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000002, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PHSUBW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0005380F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PHSUBW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0005380F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPHSUBW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000005, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PHSUBD"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0006380F, 0x00, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("PHSUBD"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0006380F, 0x00, + B_SREGI32x4|B_UPD, + B_SSEI32x4, + B_NONE, + B_NONE }, + + { T("VPHSUBD"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000006, 0x00, + B_SREGI32x4|B_UPD, + B_SVEXI32x4, + B_SSEI32x4, + B_NONE }, + + { T("PHADDSW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0003380F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PHADDSW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0003380F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPHADDSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000003, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PHSUBSW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0007380F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PHSUBSW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0007380F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPHSUBSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000007, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PMADDUBSW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0004380F, 0x00, + B_MREG8x8|B_UNSIGNED|B_UPD, + B_MMX8x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PMADDUBSW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0004380F, 0x00, + B_SREGI8x16|B_UNSIGNED|B_UPD, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPMADDUBSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000004, 0x00, + B_SREGI8x16|B_UNSIGNED|B_UPD, + B_SVEXI8x16|B_UNSIGNED, + B_SSEI8x16|B_SIGNED, + B_NONE }, + + { T("PMULHRSW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x000B380F, 0x00, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PMULHRSW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000B380F, 0x00, + B_SREGI16x8|B_UPD, + B_SSEI16x8, + B_NONE, + B_NONE }, + + { T("VPMULHRSW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000000B, 0x00, + B_SREGI16x8|B_UPD, + B_SVEXI16x8, + B_SSEI16x8, + B_NONE }, + + { T("PSHUFB"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0000380F, 0x00, + B_MREG8x8|B_UPD, + B_MMX8x8|B_BINARY, + B_NONE, + B_NONE }, + + { T("PSHUFB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0000380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16|B_BINARY, + B_NONE, + B_NONE }, + + { T("VPSHUFB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000000, 0x00, + B_SREGI8x16|B_UPD, + B_SVEXI8x16, + B_SSEI8x16|B_BINARY, + B_NONE }, + + { T("PSIGNB"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0008380F, 0x00, + B_MREG8x8|B_SIGNED|B_UPD, + B_MMX8x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PSIGNB"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0008380F, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SSEI8x16|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPSIGNB"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000008, 0x00, + B_SREGI8x16|B_SIGNED|B_UPD, + B_SVEXI8x16|B_SIGNED, + B_SSEI8x16|B_SIGNED, + B_NONE }, + + { T("PSIGNW"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x0009380F, 0x00, + B_MREG16x4|B_SIGNED|B_UPD, + B_MMX16x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PSIGNW"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x0009380F, 0x00, + B_SREGI16x8|B_SIGNED|B_UPD, + B_SSEI16x8|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPSIGNW"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x00000009, 0x00, + B_SREGI16x8|B_SIGNED|B_UPD, + B_SVEXI16x8|B_SIGNED, + B_SSEI16x8|B_SIGNED, + B_NONE }, + + { T("PSIGND"), + D_MMX|D_MUSTNONE, 0, + 3, 0x00FFFFFF, 0x000A380F, 0x00, + B_MREG32x2|B_SIGNED|B_UPD, + B_MMX32x2|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PSIGND"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x000A380F, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SSEI32x4|B_SIGNED, + B_NONE, + B_NONE }, + + { T("VPSIGND"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x0000000A, 0x00, + B_SREGI32x4|B_SIGNED|B_UPD, + B_SVEXI32x4|B_SIGNED, + B_SSEI32x4|B_SIGNED, + B_NONE }, + + { T("VBROADCASTSS"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x00000018, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VBROADCASTSD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LLONG|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x00000019, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64L|B_MEMORY, + B_NONE, + B_NONE }, + + { T("VBROADCASTF128"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LLONG|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000001A, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2|B_MEMORY|B_NOVEXSIZE|B_SHOWSIZE, + B_NONE, + B_NONE }, + + { T("VEXTRACTF128"), + D_AVX|D_MUST66, DX_VEX|DX_LLONG|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000019, 0x00, + B_SSEF64x2|B_NOVEXSIZE|B_SHOWSIZE|B_CHG, + B_SREGF64x2, + B_CONST8, + B_NONE }, + + { T("VINSERTF128"), + D_AVX|D_MUST66, DX_VEX|DX_LLONG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000018, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2|B_NOVEXSIZE|B_SHOWSIZE, + B_CONST8 }, + + { T("VMASKMOVPS"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000002C, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEF32x4|B_MEMORY, + B_NONE }, + + { T("VMASKMOVPS"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000002E, 0x00, + B_SSEF32x4|B_MEMORY|B_CHG, + B_SVEXF32x4, + B_SREGF32x4, + B_NONE }, + + { T("VMASKMOVPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000002D, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2|B_MEMORY, + B_NONE }, + + { T("VMASKMOVPD"), + D_AVX|D_MUST66|D_MEMORY, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000002F, 0x00, + B_SSEF64x2|B_MEMORY|B_CHG, + B_SVEXF64x2, + B_SREGF64x2, + B_NONE }, + + { T("VPERMILPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000000D, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEI64x2, + B_NONE }, + + { T("VPERMILPD"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000005, 0x00, + B_SREGF64x2|B_CHG, + B_SSEF64x2, + B_CONST8, + B_NONE }, + + { T("VPERMILPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000000C, 0x00, + B_SREGF32x4|B_CHG, + B_SVEXF32x4, + B_SSEI32x4, + B_NONE }, + + { T("VPERMILPS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000004, 0x00, + B_SREGF32x4|B_CHG, + B_SSEF32x4, + B_CONST8, + B_NONE }, + + { T("VPERM2F128"), + D_AVX|D_MUST66, DX_VEX|DX_LLONG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x00000006, 0x00, + B_SREGF64x2|B_CHG, + B_SVEXF64x2, + B_SSEF64x2, + B_CONST8 }, + + { T("VTESTPS"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000000E, 0x00, + B_SREGF32x4, + B_SSEF32x4, + B_NONE, + B_NONE }, + + { T("VTESTPD"), + D_AVX|D_MUST66|D_ALLFLAGS, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x0000000F, 0x00, + B_SREGF64x2, + B_SSEF64x2, + B_NONE, + B_NONE }, + + { T("VZEROALL"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LLONG|DX_NOVREG, + 1, 0x000000FF, 0x00000077, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VZEROUPPER"), + D_AVX|D_MUSTNONE, DX_VEX|DX_LSHORT|DX_NOVREG, + 1, 0x000000FF, 0x00000077, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("AESDEC"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DE380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VAESDEC"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x000000DE, 0x00, + B_SREGI8x16|B_CHG, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("AESDECLAST"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DF380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VAESDECLAST"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x000000DF, 0x00, + B_SREGI8x16|B_CHG, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("AESENC"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DC380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VAESENC"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x000000DC, 0x00, + B_SREGI8x16|B_CHG, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("AESENCLAST"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DD380F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VAESENCLAST"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_LEAD38, + 1, 0x000000FF, 0x000000DD, 0x00, + B_SREGI8x16|B_CHG, + B_SVEXI8x16, + B_SSEI8x16, + B_NONE }, + + { T("AESIMC"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DB380F, 0x00, + B_SREGI8x16|B_CHG, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("VAESIMC"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD38, + 1, 0x000000FF, 0x000000DB, 0x00, + B_SREGI8x16|B_CHG, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("AESKEYGENASSIST"), + D_SSE|D_MUST66, 0, + 3, 0x00FFFFFF, 0x00DF3A0F, 0x00, + B_SREGI8x16|B_CHG, + B_SSEI8x16, + B_CONST8|B_COUNT, + B_NONE }, + + { T("VAESKEYGENASSIST"), + D_AVX|D_MUST66, DX_VEX|DX_LSHORT|DX_NOVREG|DX_LEAD3A, + 1, 0x000000FF, 0x000000DF, 0x00, + B_SREGI8x16|B_CHG, + B_SSEI8x16, + B_CONST8|B_COUNT, + B_NONE }, + + { T("VCVTPH2PS"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD38, + 1, 0x000000FF, 0x00000013, 0x00, + B_SREGF32x4|B_CHG, + B_SSEI16x4L, + B_NONE, + B_NONE }, + + { T("VCVTPS2PH"), + D_AVX|D_MUST66, DX_VEX|DX_LBOTH|DX_NOVREG|DX_W0|DX_LEAD3A, + 1, 0x000000FF, 0x0000001D, 0x00, + B_SSEI16x4L|B_CHG, + B_SREGF32x4, + B_NONE, + B_NONE }, + + { T("LZCNT"), + D_CMD|D_NEEDF3|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x0000BD0F, 0x00, + B_REG|B_CHG, + B_INT|B_BINARY, + B_NONE, + B_NONE }, + + { T("POPCNT"), + D_CMD|D_NEEDF3|D_ALLFLAGS, 0, + 2, 0x0000FFFF, 0x0000B80F, 0x00, + B_REG|B_CHG, + B_INT|B_NOADDR, + B_NONE, + B_NONE }, + + { T("EXTRQ"), + D_SSE|D_MUST66, 0, + 2, 0x0038FFFF, 0x0000780F, 0x00, + B_SSEI8x16|B_REGONLY|B_UPD, + B_CONST8|B_COUNT, + B_CONST8_2|B_COUNT, + B_NONE }, + + { T("EXTRQ"), + D_SSE|D_MUST66, 0, + 2, 0x0000FFFF, 0x0000790F, 0x00, + B_SREGI8x16|B_UPD, + B_SSEI8x2L|B_REGONLY, + B_NONE, + B_NONE }, + + { T("INSERTQ"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000780F, 0x00, + B_SREGI8x16|B_REGONLY|B_UPD, + B_SSEI8x8L, + B_CONST8|B_COUNT, + B_CONST8_2|B_COUNT }, + + { T("INSERTQ"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x0000790F, 0x00, + B_SREGI8x16|B_REGONLY|B_UPD, + B_SSEI8x16, + B_NONE, + B_NONE }, + + { T("MOVNTSD"), + D_SSE|D_MUSTF2, 0, + 2, 0x0000FFFF, 0x00002B0F, 0x00, + B_SSEF64L|B_MEMONLY|B_CHG, + B_SREGF64L, + B_NONE, + B_NONE }, + + { T("MOVNTSS"), + D_SSE|D_MUSTF3, 0, + 2, 0x0000FFFF, 0x00002B0F, 0x00, + B_SSEF32L|B_MEMONLY|B_CHG, + B_SREGF32L, + B_NONE, + B_NONE }, + + { T("INVEPT"), + D_PRIVILEGED|D_MUST66|D_MEMORY|D_RARE, 0, + 3, 0x00FFFFFF, 0x0080380F, 0x00, + B_REG32, + B_INT128, + B_NONE, + B_NONE }, + + { T("INVVPID"), + D_PRIVILEGED|D_MUST66|D_MEMORY|D_RARE, 0, + 3, 0x00FFFFFF, 0x0081380F, 0x00, + B_REG32, + B_INT128, + B_NONE, + B_NONE }, + + { T("VMCALL"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C1010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMCLEAR"), + D_PRIVILEGED|D_MUST66|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0030C70F, 0x00, + B_INT64|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMLAUNCH"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C2010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMFUNC"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00D4010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("XEND"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00D5010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("XTEST"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00D6010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMRESUME"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C3010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMPTRLD"), + D_PRIVILEGED|D_MUSTNONE|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0030C70F, 0x00, + B_INT64|B_MEMONLY, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMPTRST"), + D_PRIVILEGED|D_MUSTNONE|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0038C70F, 0x00, + B_INT64|B_MEMONLY|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMREAD"), + D_PRIVILEGED|D_MUSTNONE|D_RARE, 0, + 2, 0x0000FFFF, 0x0000780F, 0x00, + B_INT32|B_CHG, + B_REG32, + B_NONE, + B_NONE }, + + { T("VMWRITE"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000790F, 0x00, + B_REG32, + B_INT32, + B_NONE, + B_NONE }, + + { T("VMXOFF"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00C4010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMXON"), + D_PRIVILEGED|D_MUSTF3|D_MEMORY|D_RARE, 0, + 2, 0x0038FFFF, 0x0030C70F, 0x00, + B_INT64, + B_NONE, + B_NONE, + B_NONE }, + + { T("GETSEC"), + D_PRIVILEGED|D_RARE, 0, + 2, 0x0000FFFF, 0x0000370F, 0x00, + B_EAX|B_UPD|B_PSEUDO, + B_EBX|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE }, + + { T("FEMMS"), + D_CMD, 0, + 2, 0x0000FFFF, 0x00000E0F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("PAVGUSB"), + D_MMX|D_POSTBYTE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xBF, + B_MREG8x8|B_UPD, + B_MMX8x8, + B_NONE, + B_NONE }, + + { T("PF2ID"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x1D, + B_MREG32x2|B_CHG, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFACC"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xAE, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFADD"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x9E, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFCMPEQ"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xB0, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFCMPGE"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x90, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFCMPGT"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xA0, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFMAX"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xA4, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFMIN"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x94, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFMUL"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xB4, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFRCP"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x96, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFRCPIT1"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xA6, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFRCPIT2"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xB6, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFRSQIT1"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xA7, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFRSQRT"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x97, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFSUB"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x9A, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFSUBR"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xAA, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PI2FD"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x0D, + B_3DREG|B_UPD, + B_MMX32x2|B_SIGNED, + B_NONE, + B_NONE }, + + { T("PMULHRW"), + D_MMX|D_POSTBYTE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xB7, + B_MREG16x4|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PF2IW"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x1C, + B_MREG32x2|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFNACC"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x8A, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PFPNACC"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x8E, + B_3DREG|B_UPD, + B_3DNOW, + B_NONE, + B_NONE }, + + { T("PI2FW"), + D_3DNOW|D_POSTBYTE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0x0C, + B_3DREG|B_UPD, + B_MMX16x4, + B_NONE, + B_NONE }, + + { T("PSWAPD"), + D_MMX|D_POSTBYTE|D_MUSTNONE, 0, + 2, 0x0000FFFF, 0x00000F0F, 0xBB, + B_MREG32x2|B_UPD, + B_MMX32x2, + B_NONE, + B_NONE }, + + { T("SYSCALL"), + D_SYS|D_RARE, 0, + 2, 0x0000FFFF, 0x0000050F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("SYSRET"), + D_SYS|D_ALLFLAGS|D_SUSPICIOUS, 0, + 2, 0x0000FFFF, 0x0000070F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CLGI"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00DD010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("STGI"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00DC010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("INVLPGA"), + D_PRIVILEGED|D_RARE, 0, + 3, 0x00FFFFFF, 0x00DF010F, 0x00, + B_EAX|B_PSEUDO, + B_ECX|B_PSEUDO, + B_NONE, + B_NONE }, + + { T("SKINIT"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00DE010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMLOAD"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00DA010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMMCALL"), + D_SYS|D_SUSPICIOUS, 0, + 3, 0x00FFFFFF, 0x00D9010F, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMRUN"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00D8010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("VMSAVE"), + D_PRIVILEGED, 0, + 3, 0x00FFFFFF, 0x00DB010F, 0x00, + B_EAX|B_PSEUDO, + B_NONE, + B_NONE, + B_NONE }, + + { T("ES:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000026, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("CS:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x0000002E, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("SS:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000036, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("DS:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x0000003E, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("FS:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000064, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("GS:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000065, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("DATASIZE:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000066, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("ADDRSIZE:"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x00000067, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("LOCK"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F0, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("REPNE"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F2, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("REPNZ"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F2, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("REP"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F3, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("REPE"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F3, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("REPZ"), + D_PREFIX|D_SUSPICIOUS, 0, + 1, 0x000000FF, 0x000000F3, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE }, + + { T("JCC"), + D_PSEUDO|D_BHINT|D_COND, 0, + 1, 0x000000F0, 0x00000070, 0x00, + B_BYTEOFFS|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("JCC"), + D_PSEUDO|D_BHINT|D_COND, 0, + 2, 0x0000F0FF, 0x0000800F, 0x00, + B_OFFSET|B_JMPCALL, + B_NONE, + B_NONE, + B_NONE }, + + { T("SETCC"), + D_PSEUDO|D_COND, 0, + 2, 0x0038F0FF, 0x0000900F, 0x00, + B_INT8|B_SHOWSIZE|B_CHG, + B_NONE, + B_NONE, + B_NONE }, + + { T("CMOVCC"), + D_PSEUDO|D_COND, 0, + 2, 0x0000F0FF, 0x0000400F, 0x00, + B_REG|B_UPD, + B_INT, + B_NONE, + B_NONE }, + + { T("FCMOVCC"), + D_PSEUDO|D_COND, 0, + 2, 0x0000E0FF, 0x0000C0DA, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { T("FCMOVCC"), + D_PSEUDO|D_COND, 0, + 2, 0x0000E0FF, 0x0000C0DB, 0x00, + B_ST0|B_CHG, + B_ST, + B_NONE, + B_NONE }, + + { NULL, + 0, 0, + 0, 0x00000000, 0x00000000, 0x00, + B_NONE, + B_NONE, + B_NONE, + B_NONE + } + +}; + diff --git a/Disasm201/disasm.def b/Disasm201/disasm.def new file mode 100644 index 0000000..19e3dc0 --- /dev/null +++ b/Disasm201/disasm.def @@ -0,0 +1,6 @@ +LIBRARY disasm +EXPORTS + Preparedisasm @1 + Finishdisasm @2 + Disasm @3 + Geterrwarnmessage @4 diff --git a/Disasm201/disasm.exe b/Disasm201/disasm.exe new file mode 100644 index 0000000..8e86e2b --- /dev/null +++ b/Disasm201/disasm.exe @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:33eaa5ddc7750dbdbfda3933a7606cc20e737666732dd7b25d544d6e5d925b8b +size 55359 diff --git a/Disasm201/disasm.h b/Disasm201/disasm.h new file mode 100644 index 0000000..cb28665 --- /dev/null +++ b/Disasm201/disasm.h @@ -0,0 +1,671 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// OllyDbg Disassembling Engine v2.01 // +// // +// Copyright (c) 2007-2013 Oleh Yuschuk, ollydbg@t-online.de // +// // +// This code is part of the OllyDbg Disassembler v2.01 // +// // +// Disassembling engine is free software; you can redistribute it and/or // +// modify it under the terms of the GNU General Public License as published // +// by the Free Software Foundation; either version 3 of the License, or (at // +// your option) any later version. // +// // +// This code is distributed in the hope that it will be useful, but WITHOUT // +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or // +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for // +// more details. // +// // +// You should have received a copy of the GNU General Public License along // +// with this program. If not, see . // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +// // +// This is a fast disassembler that can be used to determine the length of // +// the binary 80x86 32-bit command and its attributes, to convert it to the // +// human-readable text form, highlight its operands, and create hexadecimal // +// dump of the binary command. // +// // +// It is a stripped down version of the disassembler used by OllyDbg 2.01. // +// It can't analyse and comment the contents of the operands, or predict the // +// results of the command execution. Analysis-dependent features are not // +// included, too. Most other features are kept. // +// // +// Disassembler supports integer, FPU, MMX, 3DNow, SSE1-SSE4.1 and AVX // +// instructions. 64-bit mode, AVX2, FMA and XOP are not (yet) supported. // +// // +// This code can be compiled either in ASCII or UNICODE mode. It is reentrant // +// (thread-safe, feature not available in the original OllyDbg code). // +// // +// Typical operation speed on 3-GHz Phenom II in MASM mode is: // +// // +// Command length and info: 130 ns/command (7,700,000 commands/s) // +// Disassembly: 290 ns/command (3,400,000 commands/s) // +// Disassembly, dump, highlighting: 350 ns/command (2,800,000 commands/s) // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +////////////// PREFERRED SETTINGS AND FIXES FOR BORLAND COMPILERS ////////////// + +#ifdef __BORLANDC__ + #pragma option -a1 // Byte alignment + #pragma option -w-pin // Disable "partially bracketed" warning + // Redefinition of MAKELONG removes nasty warning under Borland Builder 4.0: + // boolean OR in one row with arithmetical shift. + #undef MAKELONG + #define MAKELONG(lo,hi) ((LONG)(((WORD)(lo))|(((DWORD)((WORD)(hi)))<<16))) +#endif + +#define MAKEWP(lo,hi) ((WPARAM)MAKELONG(lo,hi)) +#define MAKELP(lo,hi) ((LPARAM)MAKELONG(lo,hi)) + +#define LOINT(l) ((signed short)((WORD)(l))) +#define HIINT(l) ((signed short)(((DWORD)(l)>>16) & 0xFFFF)) + +#ifndef FIELD_OFFSET + #define FIELD_OFFSET(type,field) ((long)&(((type *)0)->field)) +#endif + + +//////////////////////////////////////////////////////////////////////////////// + +#define TEXTLEN 256 // Max length of text string +#define SHORTNAME 32 // Max length of short or module name + +#ifdef UNICODE + #define tchar wchar_t // Or replace it with TCHAR + #define T(x) L##x + #define tstrlen wcslen + #define tstrcpy wcscpy + #define tstrcmp wcscmp + #define tstrlwr _wcslwr + #define tsprintf swprintf + #define ttolower towlower +#else + #define tchar char + #define T(x) x + #define tstrlen strlen + #define tstrcpy strcpy + #define tstrcmp strcmp + #define tstrlwr strlwr + #define tsprintf sprintf + #define ttolower tolower +#endif + +#define NOPERAND 4 // Maximal allowed number of operands +#define NREG 8 // Number of registers (of any type) +#define NSEG 6 // Number of valid segment registers +#define MAXCMDSIZE 16 // Maximal length of valid 80x86 command +#define NEGLIMIT (-16384) // Limit to decode offsets as negative +#define DECLIMIT 16384 // Limit to decode constants as decimal + +typedef unsigned char uchar; // Unsigned character (byte) +typedef unsigned short ushort; // Unsigned short +typedef unsigned int uint; // Unsigned integer +typedef unsigned long ulong; // Unsigned long + +// CMDMASK can be used to balance between the necessary memory size and the +// disassembly time. +#define CMDMASK 0x3FFF // Search mask for Disassembler, 2**n-1 +#define NCHAIN 44300 // Max allowed number of chain links + +// Registers. +#define REG_UNDEF (-1) // Codes of general purpose registers +#define REG_EAX 0 +#define REG_ECX 1 +#define REG_EDX 2 +#define REG_EBX 3 +#define REG_ESP 4 +#define REG_EBP 5 +#define REG_ESI 6 +#define REG_EDI 7 + +#define REG_AL 0 // Symbolic indices of 8-bit registers +#define REG_CL 1 +#define REG_DL 2 +#define REG_BL 3 +#define REG_AH 4 +#define REG_CH 5 +#define REG_DH 6 +#define REG_BH 7 + +#define SEG_UNDEF (-1) // Codes of segment/selector registers +#define SEG_ES 0 +#define SEG_CS 1 +#define SEG_SS 2 +#define SEG_DS 3 +#define SEG_FS 4 +#define SEG_GS 5 + +// Command highlighting. +#define DRAW_PLAIN '.' //0x0000000C // Plain commands +#define DRAW_JUMP '>' //0x0000000D // Unconditional jump commands +#define DRAW_CJMP '?' //0x0000000E // Conditional jump commands +#define DRAW_PUSHPOP '=' //0x0000000F // PUSH/POP commands +#define DRAW_CALL '@' //0x00000010 // CALL commands +#define DRAW_RET '<' //0x00000011 // RET commands +#define DRAW_FPU '1' //0x00000012 // FPU, MMX, 3DNow! and SSE commands +#define DRAW_SUSPECT '!' //0x00000013 // Bad, system and privileged commands +// Operand highlighting. +#define DRAW_IREG 'R' //0x00000018 // General purpose registers +#define DRAW_FREG 'F' //0x00000019 // FPU, MMX and SSE registers +#define DRAW_SYSREG 'S' //0x0000001A // Segment and system registers +#define DRAW_STKMEM 'K' //0x0000001B // Memory accessed over ESP or EBP +#define DRAW_MEM 'M' //0x0000001C // Any other memory +#define DRAW_CONST 'C' //0x0000001E // Constant + +#define D_NONE 0x00000000 // No special features +// General type of command, only one is allowed. +#define D_CMDTYPE 0x0000001F // Mask to extract type of command +#define D_CMD 0x00000000 // Ordinary (none of listed below) +#define D_MOV 0x00000001 // Move to or from integer register +#define D_MOVC 0x00000002 // Conditional move to integer register +#define D_SETC 0x00000003 // Conditional set integer register +#define D_TEST 0x00000004 // Used to test data (CMP, TEST, AND...) +#define D_STRING 0x00000005 // String command with REPxxx prefix +#define D_JMP 0x00000006 // Unconditional near jump +#define D_JMPFAR 0x00000007 // Unconditional far jump +#define D_JMC 0x00000008 // Conditional jump on flags +#define D_JMCX 0x00000009 // Conditional jump on (E)CX (and flags) +#define D_PUSH 0x0000000A // PUSH exactly 1 (d)word of data +#define D_POP 0x0000000B // POP exactly 1 (d)word of data +#define D_CALL 0x0000000C // Plain near call +#define D_CALLFAR 0x0000000D // Far call +#define D_INT 0x0000000E // Interrupt +#define D_RET 0x0000000F // Plain near return from call +#define D_RETFAR 0x00000010 // Far return or IRET +#define D_FPU 0x00000011 // FPU command +#define D_MMX 0x00000012 // MMX instruction, incl. SSE extensions +#define D_3DNOW 0x00000013 // 3DNow! instruction +#define D_SSE 0x00000014 // SSE instruction +#define D_IO 0x00000015 // Accesses I/O ports +#define D_SYS 0x00000016 // Legal but useful in system code only +#define D_PRIVILEGED 0x00000017 // Privileged (non-Ring3) command +#define D_AVX 0x00000018 // AVX instruction +#define D_XOP 0x00000019 // AMD instruction with XOP prefix +#define D_DATA 0x0000001C // Data recognized by Analyser +#define D_PSEUDO 0x0000001D // Pseudocommand, for search models only +#define D_PREFIX 0x0000001E // Standalone prefix +#define D_BAD 0x0000001F // Bad or unrecognized command +// Additional parts of the command. +#define D_SIZE01 0x00000020 // Bit 0x01 in last cmd is data size +#define D_POSTBYTE 0x00000040 // Command continues in postbyte +// For string commands, either long or short form can be selected. +#define D_LONGFORM 0x00000080 // Long form of string command +// Decoding of some commands depends on data or address size. +#define D_SIZEMASK 0x00000F00 // Mask for data/address size dependence +#define D_DATA16 0x00000100 // Requires 16-bit data size +#define D_DATA32 0x00000200 // Requires 32-bit data size +#define D_ADDR16 0x00000400 // Requires 16-bit address size +#define D_ADDR32 0x00000800 // Requires 32-bit address size +// Prefixes that command may, must or must not possess. +#define D_MUSTMASK 0x0000F000 // Mask for fixed set of prefixes +#define D_NOMUST 0x00000000 // No obligatory prefixes (default) +#define D_MUST66 0x00001000 // (SSE,AVX) Requires 66, no F2 or F3 +#define D_MUSTF2 0x00002000 // (SSE,AVX) Requires F2, no 66 or F3 +#define D_MUSTF3 0x00003000 // (SSE,AVX) Requires F3, no 66 or F2 +#define D_MUSTNONE 0x00004000 // (MMX,SSE,AVX) Requires no 66, F2, F3 +#define D_NEEDF2 0x00005000 // (SSE,AVX) Requires F2, no F3 +#define D_NEEDF3 0x00006000 // (SSE,AVX) Requires F3, no F2 +#define D_NOREP 0x00007000 // Must not include F2 or F3 +#define D_MUSTREP 0x00008000 // Must include F3 (REP) +#define D_MUSTREPE 0x00009000 // Must include F3 (REPE) +#define D_MUSTREPNE 0x0000A000 // Must include F2 (REPNE) +#define D_LOCKABLE 0x00010000 // Allows for F0 (LOCK, memory only) +#define D_BHINT 0x00020000 // Allows for branch hints (2E, 3E) +// Decoding of some commands with ModRM-SIB depends whether register or memory. +#define D_MEMORY 0x00040000 // Mod field must indicate memory +#define D_REGISTER 0x00080000 // Mod field must indicate register +// Side effects caused by command. +#define D_FLAGMASK 0x00700000 // Mask to extract modified flags +#define D_NOFLAGS 0x00000000 // Flags S,Z,P,O,C remain unchanged +#define D_ALLFLAGS 0x00100000 // Modifies flags S,Z,P,O,C +#define D_FLAGZ 0x00200000 // Modifies flag Z only +#define D_FLAGC 0x00300000 // Modifies flag C only +#define D_FLAGSCO 0x00400000 // Modifies flag C and O only +#define D_FLAGD 0x00500000 // Modifies flag D only +#define D_FLAGSZPC 0x00600000 // Modifies flags Z, P and C only (FPU) +#define D_NOCFLAG 0x00700000 // S,Z,P,O modified, C unaffected +#define D_FPUMASK 0x01800000 // Mask for effects on FPU stack +#define D_FPUSAME 0x00000000 // Doesn't rotate FPU stack (default) +#define D_FPUPOP 0x00800000 // Pops FPU stack +#define D_FPUPOP2 0x01000000 // Pops FPU stack twice +#define D_FPUPUSH 0x01800000 // Pushes FPU stack +#define D_CHGESP 0x02000000 // Command indirectly modifies ESP +// Command features. +#define D_HLADIR 0x04000000 // Nonstandard order of operands in HLA +#define D_WILDCARD 0x08000000 // Mnemonics contains W/D wildcard ('*') +#define D_COND 0x10000000 // Conditional (action depends on flags) +#define D_USESCARRY 0x20000000 // Uses Carry flag +#define D_USEMASK 0xC0000000 // Mask to detect unusual commands +#define D_RARE 0x40000000 // Rare or obsolete in Win32 apps +#define D_SUSPICIOUS 0x80000000 // Suspicious command +#define D_UNDOC 0xC0000000 // Undocumented command + +// Extension of D_xxx. +#define DX_ZEROMASK 0x00000003 // How to decode FLAGS.Z flag +#define DX_JE 0x00000001 // JE, JNE instead of JZ, JNZ +#define DX_JZ 0x00000002 // JZ, JNZ instead of JE, JNE +#define DX_CARRYMASK 0x0000000C // How to decode FLAGS.C flag +#define DX_JB 0x00000004 // JAE, JB instead of JC, JNC +#define DX_JC 0x00000008 // JC, JNC instead of JAE, JB +#define DX_RETN 0x00000010 // The mnemonics is RETN +#define DX_VEX 0x00000100 // Requires VEX prefix +#define DX_VLMASK 0x00000600 // Mask to extract VEX operand length +#define DX_LSHORT 0x00000000 // 128-bit only +#define DX_LBOTH 0x00000200 // Both 128- and 256-bit versions +#define DX_LLONG 0x00000400 // 256-bit only +#define DX_IGNOREL 0x00000600 // Ignore VEX.L +#define DX_NOVREG 0x00000800 // VEX.vvvv must be set to all 1's +#define DX_VWMASK 0x00003000 // Mask to extract VEX.W +#define DX_W0 0x00001000 // VEX.W must be 0 +#define DX_W1 0x00002000 // VEX.W must be 1 +#define DX_LEADMASK 0x00070000 // Mask to extract leading opcode bytes +#define DX_LEAD0F 0x00000000 // Implied 0F leading byte (default) +#define DX_LEAD38 0x00010000 // Implied 0F 38 leading opcode bytes +#define DX_LEAD3A 0x00020000 // Implied 0F 3A leading opcode bytes +#define DX_WONKYTRAP 0x00800000 // Don't single-step this command +#define DX_TYPEMASK 0xFF000000 // Precised command type mask +#define DX_ADD 0x01000000 // The command is integer ADD +#define DX_SUB 0x02000000 // The command is integer SUB +#define DX_LEA 0x03000000 // The command is LEA +#define DX_NOP 0x04000000 // The command is NOP + +//#define DX_LVEX (DX_VEX|DX_LBOTH) +//#define DX_GVEX (DX_VEX|DX_LLONG) + +// Type of operand, only one is allowed. Size of SSE operands is given for the +// case of 128-bit operations and usually doubles for 256-bit AVX commands. If +// B_NOVEXSIZE is set, memory may double but XMM registers are not promoted to +// YMM. +#define B_ARGMASK 0x000000FF // Mask to extract type of argument +#define B_NONE 0x00000000 // Operand absent +#define B_AL 0x00000001 // Register AL +#define B_AH 0x00000002 // Register AH +#define B_AX 0x00000003 // Register AX +#define B_CL 0x00000004 // Register CL +#define B_CX 0x00000005 // Register CX +#define B_DX 0x00000006 // Register DX +#define B_DXPORT 0x00000007 // Register DX as I/O port address +#define B_EAX 0x00000008 // Register EAX +#define B_EBX 0x00000009 // Register EBX +#define B_ECX 0x0000000A // Register ECX +#define B_EDX 0x0000000B // Register EDX +#define B_ACC 0x0000000C // Accumulator (AL/AX/EAX) +#define B_STRCNT 0x0000000D // Register CX or ECX as REPxx counter +#define B_DXEDX 0x0000000E // Register DX or EDX in DIV/MUL +#define B_BPEBP 0x0000000F // Register BP or EBP in ENTER/LEAVE +#define B_REG 0x00000010 // 8/16/32-bit register in Reg +#define B_REG16 0x00000011 // 16-bit register in Reg +#define B_REG32 0x00000012 // 32-bit register in Reg +#define B_REGCMD 0x00000013 // 16/32-bit register in last cmd byte +#define B_REGCMD8 0x00000014 // 8-bit register in last cmd byte +#define B_ANYREG 0x00000015 // Reg field is unused, any allowed +#define B_INT 0x00000016 // 8/16/32-bit register/memory in ModRM +#define B_INT8 0x00000017 // 8-bit register/memory in ModRM +#define B_INT16 0x00000018 // 16-bit register/memory in ModRM +#define B_INT32 0x00000019 // 32-bit register/memory in ModRM +#define B_INT1632 0x0000001A // 16/32-bit register/memory in ModRM +#define B_INT64 0x0000001B // 64-bit integer in ModRM, memory only +#define B_INT128 0x0000001C // 128-bit integer in ModRM, memory only +#define B_IMMINT 0x0000001D // 8/16/32-bit int at immediate addr +#define B_INTPAIR 0x0000001E // Two signed 16/32 in ModRM, memory only +#define B_SEGOFFS 0x0000001F // 16:16/16:32 absolute address in memory +#define B_STRDEST 0x00000020 // 8/16/32-bit string dest, [ES:(E)DI] +#define B_STRDEST8 0x00000021 // 8-bit string destination, [ES:(E)DI] +#define B_STRSRC 0x00000022 // 8/16/32-bit string source, [(E)SI] +#define B_STRSRC8 0x00000023 // 8-bit string source, [(E)SI] +#define B_XLATMEM 0x00000024 // 8-bit memory in XLAT, [(E)BX+AL] +#define B_EAXMEM 0x00000025 // Reference to memory addressed by [EAX] +#define B_LONGDATA 0x00000026 // Long data in ModRM, mem only +#define B_ANYMEM 0x00000027 // Reference to memory, data unimportant +#define B_STKTOP 0x00000028 // 16/32-bit int top of stack +#define B_STKTOPFAR 0x00000029 // Top of stack (16:16/16:32 far addr) +#define B_STKTOPEFL 0x0000002A // 16/32-bit flags on top of stack +#define B_STKTOPA 0x0000002B // 16/32-bit top of stack all registers +#define B_PUSH 0x0000002C // 16/32-bit int push to stack +#define B_PUSHRET 0x0000002D // 16/32-bit push of return address +#define B_PUSHRETF 0x0000002E // 16:16/16:32-bit push of far retaddr +#define B_PUSHA 0x0000002F // 16/32-bit push all registers +#define B_EBPMEM 0x00000030 // 16/32-bit int at [EBP] +#define B_SEG 0x00000031 // Segment register in Reg +#define B_SEGNOCS 0x00000032 // Segment register in Reg, but not CS +#define B_SEGCS 0x00000033 // Segment register CS +#define B_SEGDS 0x00000034 // Segment register DS +#define B_SEGES 0x00000035 // Segment register ES +#define B_SEGFS 0x00000036 // Segment register FS +#define B_SEGGS 0x00000037 // Segment register GS +#define B_SEGSS 0x00000038 // Segment register SS +#define B_ST 0x00000039 // 80-bit FPU register in last cmd byte +#define B_ST0 0x0000003A // 80-bit FPU register ST0 +#define B_ST1 0x0000003B // 80-bit FPU register ST1 +#define B_FLOAT32 0x0000003C // 32-bit float in ModRM, memory only +#define B_FLOAT64 0x0000003D // 64-bit float in ModRM, memory only +#define B_FLOAT80 0x0000003E // 80-bit float in ModRM, memory only +#define B_BCD 0x0000003F // 80-bit BCD in ModRM, memory only +#define B_MREG8x8 0x00000040 // MMX register as 8 8-bit integers +#define B_MMX8x8 0x00000041 // MMX reg/memory as 8 8-bit integers +#define B_MMX8x8DI 0x00000042 // MMX 8 8-bit integers at [DS:(E)DI] +#define B_MREG16x4 0x00000043 // MMX register as 4 16-bit integers +#define B_MMX16x4 0x00000044 // MMX reg/memory as 4 16-bit integers +#define B_MREG32x2 0x00000045 // MMX register as 2 32-bit integers +#define B_MMX32x2 0x00000046 // MMX reg/memory as 2 32-bit integers +#define B_MREG64 0x00000047 // MMX register as 1 64-bit integer +#define B_MMX64 0x00000048 // MMX reg/memory as 1 64-bit integer +#define B_3DREG 0x00000049 // 3DNow! register as 2 32-bit floats +#define B_3DNOW 0x0000004A // 3DNow! reg/memory as 2 32-bit floats +#define B_XMM0I32x4 0x0000004B // XMM0 as 4 32-bit integers +#define B_XMM0I64x2 0x0000004C // XMM0 as 2 64-bit integers +#define B_XMM0I8x16 0x0000004D // XMM0 as 16 8-bit integers +#define B_SREGF32x4 0x0000004E // SSE register as 4 32-bit floats +#define B_SREGF32L 0x0000004F // Low 32-bit float in SSE register +#define B_SREGF32x2L 0x00000050 // Low 2 32-bit floats in SSE register +#define B_SSEF32x4 0x00000051 // SSE reg/memory as 4 32-bit floats +#define B_SSEF32L 0x00000052 // Low 32-bit float in SSE reg/memory +#define B_SSEF32x2L 0x00000053 // Low 2 32-bit floats in SSE reg/memory +#define B_SREGF64x2 0x00000054 // SSE register as 2 64-bit floats +#define B_SREGF64L 0x00000055 // Low 64-bit float in SSE register +#define B_SSEF64x2 0x00000056 // SSE reg/memory as 2 64-bit floats +#define B_SSEF64L 0x00000057 // Low 64-bit float in SSE reg/memory +#define B_SREGI8x16 0x00000058 // SSE register as 16 8-bit sigints +#define B_SSEI8x16 0x00000059 // SSE reg/memory as 16 8-bit sigints +#define B_SSEI8x16DI 0x0000005A // SSE 16 8-bit sigints at [DS:(E)DI] +#define B_SSEI8x8L 0x0000005B // Low 8 8-bit ints in SSE reg/memory +#define B_SSEI8x4L 0x0000005C // Low 4 8-bit ints in SSE reg/memory +#define B_SSEI8x2L 0x0000005D // Low 2 8-bit ints in SSE reg/memory +#define B_SREGI16x8 0x0000005E // SSE register as 8 16-bit sigints +#define B_SSEI16x8 0x0000005F // SSE reg/memory as 8 16-bit sigints +#define B_SSEI16x4L 0x00000060 // Low 4 16-bit ints in SSE reg/memory +#define B_SSEI16x2L 0x00000061 // Low 2 16-bit ints in SSE reg/memory +#define B_SREGI32x4 0x00000062 // SSE register as 4 32-bit sigints +#define B_SREGI32L 0x00000063 // Low 32-bit sigint in SSE register +#define B_SREGI32x2L 0x00000064 // Low 2 32-bit sigints in SSE register +#define B_SSEI32x4 0x00000065 // SSE reg/memory as 4 32-bit sigints +#define B_SSEI32x2L 0x00000066 // Low 2 32-bit sigints in SSE reg/memory +#define B_SREGI64x2 0x00000067 // SSE register as 2 64-bit sigints +#define B_SSEI64x2 0x00000068 // SSE reg/memory as 2 64-bit sigints +#define B_SREGI64L 0x00000069 // Low 64-bit sigint in SSE register +#define B_EFL 0x0000006A // Flags register EFL +#define B_FLAGS8 0x0000006B // Flags (low byte) +#define B_OFFSET 0x0000006C // 16/32 const offset from next command +#define B_BYTEOFFS 0x0000006D // 8-bit sxt const offset from next cmd +#define B_FARCONST 0x0000006E // 16:16/16:32 absolute address constant +#define B_DESCR 0x0000006F // 16:32 descriptor in ModRM +#define B_1 0x00000070 // Immediate constant 1 +#define B_CONST8 0x00000071 // Immediate 8-bit constant +#define B_CONST8_2 0x00000072 // Immediate 8-bit const, second in cmd +#define B_CONST16 0x00000073 // Immediate 16-bit constant +#define B_CONST 0x00000074 // Immediate 8/16/32-bit constant +#define B_CONSTL 0x00000075 // Immediate 16/32-bit constant +#define B_SXTCONST 0x00000076 // Immediate 8-bit sign-extended to size +#define B_CR 0x00000077 // Control register in Reg +#define B_CR0 0x00000078 // Control register CR0 +#define B_DR 0x00000079 // Debug register in Reg +#define B_FST 0x0000007A // FPU status register +#define B_FCW 0x0000007B // FPU control register +#define B_MXCSR 0x0000007C // SSE media control and status register +#define B_SVEXF32x4 0x0000007D // SSE reg in VEX as 4 32-bit floats +#define B_SVEXF32L 0x0000007E // Low 32-bit float in SSE in VEX +#define B_SVEXF64x2 0x0000007F // SSE reg in VEX as 2 64-bit floats +#define B_SVEXF64L 0x00000080 // Low 64-bit float in SSE in VEX +#define B_SVEXI8x16 0x00000081 // SSE reg in VEX as 16 8-bit sigints +#define B_SVEXI16x8 0x00000082 // SSE reg in VEX as 8 16-bit sigints +#define B_SVEXI32x4 0x00000083 // SSE reg in VEX as 4 32-bit sigints +#define B_SVEXI64x2 0x00000084 // SSE reg in VEX as 2 64-bit sigints +#define B_SIMMI8x16 0x00000085 // SSE reg in immediate 8-bit constant +// Type modifiers, used for interpretation of contents, only one is allowed. +#define B_MODMASK 0x000F0000 // Mask to extract type modifier +#define B_NONSPEC 0x00000000 // Non-specific operand +#define B_UNSIGNED 0x00010000 // Decode as unsigned decimal +#define B_SIGNED 0x00020000 // Decode as signed decimal +#define B_BINARY 0x00030000 // Decode as binary (full hex) data +#define B_BITCNT 0x00040000 // Bit count +#define B_SHIFTCNT 0x00050000 // Shift count +#define B_COUNT 0x00060000 // General-purpose count +#define B_NOADDR 0x00070000 // Not an address +#define B_JMPCALL 0x00080000 // Near jump/call/return destination +#define B_JMPCALLFAR 0x00090000 // Far jump/call/return destination +#define B_STACKINC 0x000A0000 // Unsigned stack increment/decrement +#define B_PORT 0x000B0000 // I/O port +#define B_ADDR 0x000F0000 // Used internally +// Validity markers. +#define B_MEMORY 0x00100000 // Memory only, reg version different +#define B_REGISTER 0x00200000 // Register only, mem version different +#define B_MEMONLY 0x00400000 // Warn if operand in register +#define B_REGONLY 0x00800000 // Warn if operand in memory +#define B_32BITONLY 0x01000000 // Warn if 16-bit operand +#define B_NOESP 0x02000000 // ESP is not allowed +// Miscellaneous options. +#define B_NOVEXSIZE 0x04000000 // Always 128-bit SSE in 256-bit AVX +#define B_SHOWSIZE 0x08000000 // Always show argument size in disasm +#define B_CHG 0x10000000 // Changed, old contents is not used +#define B_UPD 0x20000000 // Modified using old contents +#define B_PSEUDO 0x40000000 // Pseoudooperand, not in assembler cmd +#define B_NOSEG 0x80000000 // Don't add offset of selector + +// Location of operand, only one bit is allowed. +#define OP_SOMEREG 0x000000FF // Mask for any kind of register +#define OP_REGISTER 0x00000001 // Operand is a general-purpose register +#define OP_SEGREG 0x00000002 // Operand is a segment register +#define OP_FPUREG 0x00000004 // Operand is a FPU register +#define OP_MMXREG 0x00000008 // Operand is a MMX register +#define OP_3DNOWREG 0x00000010 // Operand is a 3DNow! register +#define OP_SSEREG 0x00000020 // Operand is a SSE register +#define OP_CREG 0x00000040 // Operand is a control register +#define OP_DREG 0x00000080 // Operand is a debug register +#define OP_MEMORY 0x00000100 // Operand is in memory +#define OP_CONST 0x00000200 // Operand is an immediate constant +// Additional operand properties. +#define OP_PORT 0x00000400 // Used to access I/O port +#define OP_OTHERREG 0x00000800 // Special register like EFL or MXCSR +#define OP_INVALID 0x00001000 // Invalid operand, like reg in mem-only +#define OP_PSEUDO 0x00002000 // Pseudooperand (not in mnenonics) +#define OP_MOD 0x00004000 // Command may change/update operand +#define OP_MODREG 0x00008000 // Memory, but modifies reg (POP,MOVSD) +#define OP_IMPORT 0x00020000 // Value imported from different module +#define OP_SELECTOR 0x00040000 // Includes immediate selector +// Additional properties of memory address. +#define OP_INDEXED 0x00080000 // Memory address contains registers +#define OP_OPCONST 0x00100000 // Memory address contains constant +#define OP_ADDR16 0x00200000 // 16-bit memory address +#define OP_ADDR32 0x00400000 // Explicit 32-bit memory address + +#define DAMODE_MASM 0 // MASM assembling/disassembling style +#define DAMODE_IDEAL 1 // IDEAL assembling/disassembling style +#define DAMODE_HLA 2 // HLA assembling/disassembling style +#define DAMODE_ATT 3 // AT&T disassembling style + +#define NUM_STYLE 0x0003 // Mask to extract hex style +#define NUM_STD 0x0000 // 123, 12345678h, 0ABCD1234h +#define NUM_X 0x0001 // 123, 0x12345678, 0xABCD1234 +#define NUM_OLLY 0x0002 // 123., 12345678, 0ABCD1234 +#define NUM_LONG 0x0010 // 00001234h instead of 1234h +#define NUM_DECIMAL 0x0020 // 123 instead of 7Bh if under DECLIMIT + +// Disassembling options. +#define DA_TEXT 0x00000001 // Decode command to text and comment +#define DA_HILITE 0x00000002 // Use syntax highlighting +#define DA_JZ 0x00000004 // JZ, JNZ instead of JE, JNE +#define DA_JC 0x00000008 // JC, JNC instead of JAE, JB +#define DA_DUMP 0x00000020 // Dump command to hexadecimal text +#define DA_PSEUDO 0x00000400 // List pseudooperands + +// Disassembling errors. +#define DAE_NOERR 0x00000000 // No errors +#define DAE_BADCMD 0x00000001 // Unrecognized command +#define DAE_CROSS 0x00000002 // Command crosses end of memory block +#define DAE_MEMORY 0x00000004 // Register where only memory allowed +#define DAE_REGISTER 0x00000008 // Memory where only register allowed +#define DAE_LOCK 0x00000010 // LOCK prefix is not allowed +#define DAE_BADSEG 0x00000020 // Invalid segment register +#define DAE_SAMEPREF 0x00000040 // Two prefixes from the same group +#define DAE_MANYPREF 0x00000080 // More than 4 prefixes +#define DAE_BADCR 0x00000100 // Invalid CR register +#define DAE_INTERN 0x00000200 // Internal error + +// Disassembling warnings. +#define DAW_NOWARN 0x00000000 // No warnings +#define DAW_DATASIZE 0x00000001 // Superfluous data size prefix +#define DAW_ADDRSIZE 0x00000002 // Superfluous address size prefix +#define DAW_SEGPREFIX 0x00000004 // Superfluous segment override prefix +#define DAW_REPPREFIX 0x00000008 // Superfluous REPxx prefix +#define DAW_DEFSEG 0x00000010 // Segment prefix coincides with default +#define DAW_JMP16 0x00000020 // 16-bit jump, call or return +#define DAW_FARADDR 0x00000040 // Far jump or call +#define DAW_SEGMOD 0x00000080 // Modifies segment register +#define DAW_PRIV 0x00000100 // Privileged command +#define DAW_IO 0x00000200 // I/O command +#define DAW_SHIFT 0x00000400 // Shift out of range 1..31 +#define DAW_LOCK 0x00000800 // Command with valid LOCK prefix +#define DAW_STACK 0x00001000 // Unaligned stack operation +#define DAW_NOESP 0x00002000 // Suspicious use of stack pointer +#define DAW_RARE 0x00004000 // Rare, seldom used command +#define DAW_NONCLASS 0x00008000 // Non-standard or non-documented code +#define DAW_INTERRUPT 0x00010000 // Interrupt command + +// List of prefixes. +#define PF_SEGMASK 0x0000003F // Mask for segment override prefixes +#define PF_ES 0x00000001 // 0x26, ES segment override +#define PF_CS 0x00000002 // 0x2E, CS segment override +#define PF_SS 0x00000004 // 0x36, SS segment override +#define PF_DS 0x00000008 // 0x3E, DS segment override +#define PF_FS 0x00000010 // 0x64, FS segment override +#define PF_GS 0x00000020 // 0x65, GS segment override +#define PF_DSIZE 0x00000040 // 0x66, data size override +#define PF_ASIZE 0x00000080 // 0x67, address size override +#define PF_LOCK 0x00000100 // 0xF0, bus lock +#define PF_REPMASK 0x00000600 // Mask for repeat prefixes +#define PF_REPNE 0x00000200 // 0xF2, REPNE prefix +#define PF_REP 0x00000400 // 0xF3, REP/REPE prefix +#define PF_BYTE 0x00000800 // Size bit in command, used in cmdexec +#define PF_MUSTMASK D_MUSTMASK // Necessary prefixes, used in t_asmmod +#define PF_VEX2 0x00010000 // 2-byte VEX prefix +#define PF_VEX3 0x00020000 // 3-byte VEX prefix +// Useful shortcuts. +#define PF_66 PF_DSIZE // Alternative names for SSE prefixes +#define PF_F2 PF_REPNE +#define PF_F3 PF_REP +#define PF_HINT (PF_CS|PF_DS) // Alternative names for branch hints +#define PF_NOTTAKEN PF_CS +#define PF_TAKEN PF_DS +#define PF_VEX (PF_VEX2|PF_VEX3) + +typedef struct t_modrm { // ModRM byte decoding + ulong size; // Total size with SIB and disp, bytes + struct t_modrm *psib; // Pointer to SIB table or NULL + ulong dispsize; // Size of displacement or 0 if none + ulong features; // Operand features, set of OP_xxx + int reg; // Register index or REG_UNDEF + int defseg; // Default selector (SEG_xxx) + uchar scale[NREG]; // Scales of registers in memory address + ulong aregs; // List of registers used in address + int basereg; // Register used as base or REG_UNDEF + tchar ardec[SHORTNAME]; // Register part of address, INTEL fmt + tchar aratt[SHORTNAME]; // Register part of address, AT&T fmt +} t_modrm; + +typedef struct t_bincmd { // Description of 80x86 command + tchar *name; // Symbolic name for this command + ulong cmdtype; // Command's features, set of D_xxx + ulong exttype; // More features, set of DX_xxx + ulong length; // Length of main code (before ModRM/SIB) + ulong mask; // Mask for first 4 bytes of the command + ulong code; // Compare masked bytes with this + ulong postbyte; // Postbyte + ulong arg[NOPERAND]; // Types of arguments, set of B_xxx +} t_bincmd; + +typedef struct t_chain { // Element of command chain + const t_bincmd *pcmd; // Pointer to command descriptor or NULL + struct t_chain *pnext; // Pointer to next element in chain +} t_chain; + +typedef struct t_config { // Disassembler configuration + int disasmmode; // Main style, one of DAMODE_xxx + int memmode; // Constant part of address, NUM_xxx + int jmpmode; // Jump/call destination, NUM_xxx + int binconstmode; // Binary constants, NUM_xxx + int constmode; // Numeric constants, NUM_xxx + int lowercase; // Force lowercase display + int tabarguments; // Tab between mnemonic and arguments + int extraspace; // Extra space between arguments + int useretform; // Use RET instead of RETN + int shortstringcmds; // Use short form of string commands + int putdefseg; // Display default segments in listing + int showmemsize; // Always show memory size + int shownear; // Show NEAR modifiers + int ssesizemode; // How to decode size of SSE operands + int jumphintmode; // How to decode jump hints + int sizesens; // How to decode size-sensitive mnemonics + int simplifiedst; // How to decode top of FPU stack + int hiliteoperands; // Highlight operands +} t_config; + +typedef struct t_operand { // Description of disassembled operand + // Description of operand. + ulong features; // Operand features, set of OP_xxx + ulong arg; // Operand type, set of B_xxx +// int optype; // DEC_INT, DEC_FLOAT or DEC_UNKNOWN + int opsize; // Total size of data, bytes + int granularity; // Size of element (opsize exc. MMX/SSE) + int reg; // REG_xxx (also ESP in POP) or REG_UNDEF + ulong uses; // List of used regs (not in address!) + ulong modifies; // List of modified regs (not in addr!) + // Description of memory address. + int seg; // Selector (SEG_xxx) + uchar scale[NREG]; // Scales of registers in memory address + ulong aregs; // List of registers used in address + ulong opconst; // Constant or const part of address + ulong selector; // Immediate selector in far jump/call + // Textual decoding. + tchar text[TEXTLEN]; // Operand, decoded to text +} t_operand; + +// Note that used registers are those which contents is necessary to create +// result. Modified registers are those which value is changed. For example, +// command MOV EAX,[EBX+ECX] uses EBX and ECX and modifies EAX. Command +// ADD ESI,EDI uses ESI and EDI and modifies ESI. +typedef struct t_disasm { // Disassembled command + ulong ip; // Address of first command byte + ulong size; // Full length of command, bytes + ulong cmdtype; // Type of command, D_xxx + ulong exttype; // More features, set of DX_xxx + ulong prefixes; // List of prefixes, set of PF_xxx + ulong nprefix; // Number of prefixes, including SSE2 + ulong memfixup; // Offset of first 4-byte fixup or -1 + ulong immfixup; // Offset of second 4-byte fixup or -1 + int errors; // Set of DAE_xxx + int warnings; // Set of DAW_xxx + ulong uses; // List of used registers + ulong modifies; // List of modified registers + ulong memconst; // Constant in memory address or 0 + ulong stackinc; // Data size in ENTER/RETN/RETF + t_operand op[NOPERAND]; // Operands + tchar dump[TEXTLEN]; // Hex dump of the command + tchar result[TEXTLEN]; // Fully decoded command as text + uchar mask[TEXTLEN]; // Mask to highlight result + int masksize; // Length of mask corresponding to result +} t_disasm; + +extern t_modrm modrm16[256]; // 16-bit ModRM decodings +extern t_modrm modrm32[256]; // 32-bit ModRM decodings without SIB +extern t_modrm sib0[256]; // ModRM-SIB decodings with Mod=00 +extern t_modrm sib1[256]; // ModRM-SIB decodings with Mod=01 +extern t_modrm sib2[256]; // ModRM-SIB decodings with Mod=10 + +extern const t_bincmd bincmd[]; // List of 80x86 commands +extern t_chain *cmdchain; // Commands sorted by first CMDMASK bits + +int Preparedisasm(void); +void Finishdisasm(void); + +ulong Disasm(uchar const *cmd,ulong cmdsize,ulong cmdip, + t_disasm *da,int cmdmode,t_config *cmdconfig, + int (*decodeaddress)(tchar *s,ulong addr)); +tchar *Geterrwarnmessage(ulong errors,ulong warnings); + diff --git a/Disasm201/disasm.vs2008.sln b/Disasm201/disasm.vs2008.sln new file mode 100644 index 0000000..ba3ca51 --- /dev/null +++ b/Disasm201/disasm.vs2008.sln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 10.00 +# Visual Studio 2008 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "disasm", "disasm.vs2008.vcproj", "{579E7FE7-2745-4100-A802-23511711FCDE}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + Release|Win32 = Release|Win32 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {579E7FE7-2745-4100-A802-23511711FCDE}.Debug|Win32.ActiveCfg = Debug|Win32 + {579E7FE7-2745-4100-A802-23511711FCDE}.Debug|Win32.Build.0 = Debug|Win32 + {579E7FE7-2745-4100-A802-23511711FCDE}.Release|Win32.ActiveCfg = Release|Win32 + {579E7FE7-2745-4100-A802-23511711FCDE}.Release|Win32.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Disasm201/disasm.vs2008.suo b/Disasm201/disasm.vs2008.suo new file mode 100644 index 0000000..9d8f6ce Binary files /dev/null and b/Disasm201/disasm.vs2008.suo differ diff --git a/Disasm201/disasm.vs2008.vcproj b/Disasm201/disasm.vs2008.vcproj new file mode 100644 index 0000000..5435ccf --- /dev/null +++ b/Disasm201/disasm.vs2008.vcproj @@ -0,0 +1,249 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Disasm201/main.c b/Disasm201/main.c new file mode 100644 index 0000000..01b2d8a --- /dev/null +++ b/Disasm201/main.c @@ -0,0 +1,111 @@ +#include +#include +#include +#pragma hdrstop + +#include "disasm.h" + +int Decodeaddress(tchar *s,ulong addr) { + if (addr<1024 || addr>50000) return 0; + return sprintf(s,"LABEL_%x",addr); +}; + +int main(int argc,tchar* argv[]) { + int m,n,len,cmdlen,pos,ncmd; + uchar *cmd; + tchar *pmsg,s[512]; + ulong t; + t_disasm da; + FILE *f,*g; + + Preparedisasm(); + + f=fopen("disasm.exe","rb"); + + fseek(f,0,SEEK_END); + len=ftell(f); + fseek(f,0,SEEK_SET); + cmd=(uchar *)malloc(len); + fread(cmd,len,1,f); + fclose(f); + + // First loop: determine length of the command, no text. + printf("Determine command length and get information:\n"); + pos=0; + ncmd=0; + t=GetTickCount(); + while (pos0) { + for (n=0; n<30; n++) s[n]=T(' '); + for (m=0; m. // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +// // +// This is a fast disassembler that can be used to determine the length of // +// the binary 80x86 32-bit command and its attributes, to convert it to the // +// human-readable text form, highlight its operands, and create hexadecimal // +// dump of the binary command. // +// // +// It is a stripped down version of the disassembler used by OllyDbg 2.01. // +// It can't analyse and comment the contents of the operands, or predict the // +// results of the command execution. Analysis-dependent features are not // +// included, too. Most other features are kept. // +// // +// Disassembler supports integer, FPU, MMX, 3DNow, SSE1-SSE4.1 and AVX // +// instructions. 64-bit mode, AVX2, FMA and XOP are not (yet) supported. // +// // +// This code can be compiled either in ASCII or UNICODE mode. It is reentrant // +// (thread-safe, feature not available in the original OllyDbg code). // +// // +// Typical operation speed on 3-GHz Phenom II in MASM mode is: // +// // +// Command length and info: 130 ns/command (7,700,000 commands/s) // +// Disassembly: 290 ns/command (3,400,000 commands/s) // +// Disassembly, dump, highlighting: 350 ns/command (2,800,000 commands/s) // +// // +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +////////////// PREFERRED SETTINGS AND FIXES FOR BORLAND COMPILERS ////////////// + +#ifdef __BORLANDC__ + #pragma option -a1 // Byte alignment + #pragma option -w-pin // Disable "partially bracketed" warning + // Redefinition of MAKELONG removes nasty warning under Borland Builder 4.0: + // boolean OR in one row with arithmetical shift. + #undef MAKELONG + #define MAKELONG(lo,hi) ((LONG)(((WORD)(lo))|(((DWORD)((WORD)(hi)))<<16))) +#endif + +#define MAKEWP(lo,hi) ((WPARAM)MAKELONG(lo,hi)) +#define MAKELP(lo,hi) ((LPARAM)MAKELONG(lo,hi)) + +#define LOINT(l) ((signed short)((WORD)(l))) +#define HIINT(l) ((signed short)(((DWORD)(l)>>16) & 0xFFFF)) + +#ifndef FIELD_OFFSET + #define FIELD_OFFSET(type,field) ((long)&(((type *)0)->field)) +#endif + + +//////////////////////////////////////////////////////////////////////////////// + +#define TEXTLEN 256 // Max length of text string +#define SHORTNAME 32 // Max length of short or module name + +#ifdef UNICODE + #define tchar wchar_t // Or replace it with TCHAR + #define T(x) L##x + #define tstrlen wcslen + #define tstrcpy wcscpy + #define tstrcmp wcscmp + #define tstrlwr _wcslwr + #define tsprintf swprintf + #define ttolower towlower +#else + #define tchar char + #define T(x) x + #define tstrlen strlen + #define tstrcpy strcpy + #define tstrcmp strcmp + #define tstrlwr strlwr + #define tsprintf sprintf + #define ttolower tolower +#endif + +#define NOPERAND 4 // Maximal allowed number of operands +#define NREG 8 // Number of registers (of any type) +#define NSEG 6 // Number of valid segment registers +#define MAXCMDSIZE 16 // Maximal length of valid 80x86 command +#define NEGLIMIT (-16384) // Limit to decode offsets as negative +#define DECLIMIT 16384 // Limit to decode constants as decimal + +typedef unsigned char uchar; // Unsigned character (byte) +typedef unsigned short ushort; // Unsigned short +typedef unsigned int uint; // Unsigned integer +typedef unsigned long ulong; // Unsigned long + +// CMDMASK can be used to balance between the necessary memory size and the +// disassembly time. +#define CMDMASK 0x3FFF // Search mask for Disassembler, 2**n-1 +#define NCHAIN 44300 // Max allowed number of chain links + +// Registers. +#define REG_UNDEF (-1) // Codes of general purpose registers +#define REG_EAX 0 +#define REG_ECX 1 +#define REG_EDX 2 +#define REG_EBX 3 +#define REG_ESP 4 +#define REG_EBP 5 +#define REG_ESI 6 +#define REG_EDI 7 + +#define REG_AL 0 // Symbolic indices of 8-bit registers +#define REG_CL 1 +#define REG_DL 2 +#define REG_BL 3 +#define REG_AH 4 +#define REG_CH 5 +#define REG_DH 6 +#define REG_BH 7 + +#define SEG_UNDEF (-1) // Codes of segment/selector registers +#define SEG_ES 0 +#define SEG_CS 1 +#define SEG_SS 2 +#define SEG_DS 3 +#define SEG_FS 4 +#define SEG_GS 5 + +// Command highlighting. +#define DRAW_PLAIN '.' //0x0000000C // Plain commands +#define DRAW_JUMP '>' //0x0000000D // Unconditional jump commands +#define DRAW_CJMP '?' //0x0000000E // Conditional jump commands +#define DRAW_PUSHPOP '=' //0x0000000F // PUSH/POP commands +#define DRAW_CALL '@' //0x00000010 // CALL commands +#define DRAW_RET '<' //0x00000011 // RET commands +#define DRAW_FPU '1' //0x00000012 // FPU, MMX, 3DNow! and SSE commands +#define DRAW_SUSPECT '!' //0x00000013 // Bad, system and privileged commands +// Operand highlighting. +#define DRAW_IREG 'R' //0x00000018 // General purpose registers +#define DRAW_FREG 'F' //0x00000019 // FPU, MMX and SSE registers +#define DRAW_SYSREG 'S' //0x0000001A // Segment and system registers +#define DRAW_STKMEM 'K' //0x0000001B // Memory accessed over ESP or EBP +#define DRAW_MEM 'M' //0x0000001C // Any other memory +#define DRAW_CONST 'C' //0x0000001E // Constant + +#define D_NONE 0x00000000 // No special features +// General type of command, only one is allowed. +#define D_CMDTYPE 0x0000001F // Mask to extract type of command +#define D_CMD 0x00000000 // Ordinary (none of listed below) +#define D_MOV 0x00000001 // Move to or from integer register +#define D_MOVC 0x00000002 // Conditional move to integer register +#define D_SETC 0x00000003 // Conditional set integer register +#define D_TEST 0x00000004 // Used to test data (CMP, TEST, AND...) +#define D_STRING 0x00000005 // String command with REPxxx prefix +#define D_JMP 0x00000006 // Unconditional near jump +#define D_JMPFAR 0x00000007 // Unconditional far jump +#define D_JMC 0x00000008 // Conditional jump on flags +#define D_JMCX 0x00000009 // Conditional jump on (E)CX (and flags) +#define D_PUSH 0x0000000A // PUSH exactly 1 (d)word of data +#define D_POP 0x0000000B // POP exactly 1 (d)word of data +#define D_CALL 0x0000000C // Plain near call +#define D_CALLFAR 0x0000000D // Far call +#define D_INT 0x0000000E // Interrupt +#define D_RET 0x0000000F // Plain near return from call +#define D_RETFAR 0x00000010 // Far return or IRET +#define D_FPU 0x00000011 // FPU command +#define D_MMX 0x00000012 // MMX instruction, incl. SSE extensions +#define D_3DNOW 0x00000013 // 3DNow! instruction +#define D_SSE 0x00000014 // SSE instruction +#define D_IO 0x00000015 // Accesses I/O ports +#define D_SYS 0x00000016 // Legal but useful in system code only +#define D_PRIVILEGED 0x00000017 // Privileged (non-Ring3) command +#define D_AVX 0x00000018 // AVX instruction +#define D_XOP 0x00000019 // AMD instruction with XOP prefix +#define D_DATA 0x0000001C // Data recognized by Analyser +#define D_PSEUDO 0x0000001D // Pseudocommand, for search models only +#define D_PREFIX 0x0000001E // Standalone prefix +#define D_BAD 0x0000001F // Bad or unrecognized command +// Additional parts of the command. +#define D_SIZE01 0x00000020 // Bit 0x01 in last cmd is data size +#define D_POSTBYTE 0x00000040 // Command continues in postbyte +// For string commands, either long or short form can be selected. +#define D_LONGFORM 0x00000080 // Long form of string command +// Decoding of some commands depends on data or address size. +#define D_SIZEMASK 0x00000F00 // Mask for data/address size dependence +#define D_DATA16 0x00000100 // Requires 16-bit data size +#define D_DATA32 0x00000200 // Requires 32-bit data size +#define D_ADDR16 0x00000400 // Requires 16-bit address size +#define D_ADDR32 0x00000800 // Requires 32-bit address size +// Prefixes that command may, must or must not possess. +#define D_MUSTMASK 0x0000F000 // Mask for fixed set of prefixes +#define D_NOMUST 0x00000000 // No obligatory prefixes (default) +#define D_MUST66 0x00001000 // (SSE,AVX) Requires 66, no F2 or F3 +#define D_MUSTF2 0x00002000 // (SSE,AVX) Requires F2, no 66 or F3 +#define D_MUSTF3 0x00003000 // (SSE,AVX) Requires F3, no 66 or F2 +#define D_MUSTNONE 0x00004000 // (MMX,SSE,AVX) Requires no 66, F2, F3 +#define D_NEEDF2 0x00005000 // (SSE,AVX) Requires F2, no F3 +#define D_NEEDF3 0x00006000 // (SSE,AVX) Requires F3, no F2 +#define D_NOREP 0x00007000 // Must not include F2 or F3 +#define D_MUSTREP 0x00008000 // Must include F3 (REP) +#define D_MUSTREPE 0x00009000 // Must include F3 (REPE) +#define D_MUSTREPNE 0x0000A000 // Must include F2 (REPNE) +#define D_LOCKABLE 0x00010000 // Allows for F0 (LOCK, memory only) +#define D_BHINT 0x00020000 // Allows for branch hints (2E, 3E) +// Decoding of some commands with ModRM-SIB depends whether register or memory. +#define D_MEMORY 0x00040000 // Mod field must indicate memory +#define D_REGISTER 0x00080000 // Mod field must indicate register +// Side effects caused by command. +#define D_FLAGMASK 0x00700000 // Mask to extract modified flags +#define D_NOFLAGS 0x00000000 // Flags S,Z,P,O,C remain unchanged +#define D_ALLFLAGS 0x00100000 // Modifies flags S,Z,P,O,C +#define D_FLAGZ 0x00200000 // Modifies flag Z only +#define D_FLAGC 0x00300000 // Modifies flag C only +#define D_FLAGSCO 0x00400000 // Modifies flag C and O only +#define D_FLAGD 0x00500000 // Modifies flag D only +#define D_FLAGSZPC 0x00600000 // Modifies flags Z, P and C only (FPU) +#define D_NOCFLAG 0x00700000 // S,Z,P,O modified, C unaffected +#define D_FPUMASK 0x01800000 // Mask for effects on FPU stack +#define D_FPUSAME 0x00000000 // Doesn't rotate FPU stack (default) +#define D_FPUPOP 0x00800000 // Pops FPU stack +#define D_FPUPOP2 0x01000000 // Pops FPU stack twice +#define D_FPUPUSH 0x01800000 // Pushes FPU stack +#define D_CHGESP 0x02000000 // Command indirectly modifies ESP +// Command features. +#define D_HLADIR 0x04000000 // Nonstandard order of operands in HLA +#define D_WILDCARD 0x08000000 // Mnemonics contains W/D wildcard ('*') +#define D_COND 0x10000000 // Conditional (action depends on flags) +#define D_USESCARRY 0x20000000 // Uses Carry flag +#define D_USEMASK 0xC0000000 // Mask to detect unusual commands +#define D_RARE 0x40000000 // Rare or obsolete in Win32 apps +#define D_SUSPICIOUS 0x80000000 // Suspicious command +#define D_UNDOC 0xC0000000 // Undocumented command + +// Extension of D_xxx. +#define DX_ZEROMASK 0x00000003 // How to decode FLAGS.Z flag +#define DX_JE 0x00000001 // JE, JNE instead of JZ, JNZ +#define DX_JZ 0x00000002 // JZ, JNZ instead of JE, JNE +#define DX_CARRYMASK 0x0000000C // How to decode FLAGS.C flag +#define DX_JB 0x00000004 // JAE, JB instead of JC, JNC +#define DX_JC 0x00000008 // JC, JNC instead of JAE, JB +#define DX_RETN 0x00000010 // The mnemonics is RETN +#define DX_VEX 0x00000100 // Requires VEX prefix +#define DX_VLMASK 0x00000600 // Mask to extract VEX operand length +#define DX_LSHORT 0x00000000 // 128-bit only +#define DX_LBOTH 0x00000200 // Both 128- and 256-bit versions +#define DX_LLONG 0x00000400 // 256-bit only +#define DX_IGNOREL 0x00000600 // Ignore VEX.L +#define DX_NOVREG 0x00000800 // VEX.vvvv must be set to all 1's +#define DX_VWMASK 0x00003000 // Mask to extract VEX.W +#define DX_W0 0x00001000 // VEX.W must be 0 +#define DX_W1 0x00002000 // VEX.W must be 1 +#define DX_LEADMASK 0x00070000 // Mask to extract leading opcode bytes +#define DX_LEAD0F 0x00000000 // Implied 0F leading byte (default) +#define DX_LEAD38 0x00010000 // Implied 0F 38 leading opcode bytes +#define DX_LEAD3A 0x00020000 // Implied 0F 3A leading opcode bytes +#define DX_WONKYTRAP 0x00800000 // Don't single-step this command +#define DX_TYPEMASK 0xFF000000 // Precised command type mask +#define DX_ADD 0x01000000 // The command is integer ADD +#define DX_SUB 0x02000000 // The command is integer SUB +#define DX_LEA 0x03000000 // The command is LEA +#define DX_NOP 0x04000000 // The command is NOP + +//#define DX_LVEX (DX_VEX|DX_LBOTH) +//#define DX_GVEX (DX_VEX|DX_LLONG) + +// Type of operand, only one is allowed. Size of SSE operands is given for the +// case of 128-bit operations and usually doubles for 256-bit AVX commands. If +// B_NOVEXSIZE is set, memory may double but XMM registers are not promoted to +// YMM. +#define B_ARGMASK 0x000000FF // Mask to extract type of argument +#define B_NONE 0x00000000 // Operand absent +#define B_AL 0x00000001 // Register AL +#define B_AH 0x00000002 // Register AH +#define B_AX 0x00000003 // Register AX +#define B_CL 0x00000004 // Register CL +#define B_CX 0x00000005 // Register CX +#define B_DX 0x00000006 // Register DX +#define B_DXPORT 0x00000007 // Register DX as I/O port address +#define B_EAX 0x00000008 // Register EAX +#define B_EBX 0x00000009 // Register EBX +#define B_ECX 0x0000000A // Register ECX +#define B_EDX 0x0000000B // Register EDX +#define B_ACC 0x0000000C // Accumulator (AL/AX/EAX) +#define B_STRCNT 0x0000000D // Register CX or ECX as REPxx counter +#define B_DXEDX 0x0000000E // Register DX or EDX in DIV/MUL +#define B_BPEBP 0x0000000F // Register BP or EBP in ENTER/LEAVE +#define B_REG 0x00000010 // 8/16/32-bit register in Reg +#define B_REG16 0x00000011 // 16-bit register in Reg +#define B_REG32 0x00000012 // 32-bit register in Reg +#define B_REGCMD 0x00000013 // 16/32-bit register in last cmd byte +#define B_REGCMD8 0x00000014 // 8-bit register in last cmd byte +#define B_ANYREG 0x00000015 // Reg field is unused, any allowed +#define B_INT 0x00000016 // 8/16/32-bit register/memory in ModRM +#define B_INT8 0x00000017 // 8-bit register/memory in ModRM +#define B_INT16 0x00000018 // 16-bit register/memory in ModRM +#define B_INT32 0x00000019 // 32-bit register/memory in ModRM +#define B_INT1632 0x0000001A // 16/32-bit register/memory in ModRM +#define B_INT64 0x0000001B // 64-bit integer in ModRM, memory only +#define B_INT128 0x0000001C // 128-bit integer in ModRM, memory only +#define B_IMMINT 0x0000001D // 8/16/32-bit int at immediate addr +#define B_INTPAIR 0x0000001E // Two signed 16/32 in ModRM, memory only +#define B_SEGOFFS 0x0000001F // 16:16/16:32 absolute address in memory +#define B_STRDEST 0x00000020 // 8/16/32-bit string dest, [ES:(E)DI] +#define B_STRDEST8 0x00000021 // 8-bit string destination, [ES:(E)DI] +#define B_STRSRC 0x00000022 // 8/16/32-bit string source, [(E)SI] +#define B_STRSRC8 0x00000023 // 8-bit string source, [(E)SI] +#define B_XLATMEM 0x00000024 // 8-bit memory in XLAT, [(E)BX+AL] +#define B_EAXMEM 0x00000025 // Reference to memory addressed by [EAX] +#define B_LONGDATA 0x00000026 // Long data in ModRM, mem only +#define B_ANYMEM 0x00000027 // Reference to memory, data unimportant +#define B_STKTOP 0x00000028 // 16/32-bit int top of stack +#define B_STKTOPFAR 0x00000029 // Top of stack (16:16/16:32 far addr) +#define B_STKTOPEFL 0x0000002A // 16/32-bit flags on top of stack +#define B_STKTOPA 0x0000002B // 16/32-bit top of stack all registers +#define B_PUSH 0x0000002C // 16/32-bit int push to stack +#define B_PUSHRET 0x0000002D // 16/32-bit push of return address +#define B_PUSHRETF 0x0000002E // 16:16/16:32-bit push of far retaddr +#define B_PUSHA 0x0000002F // 16/32-bit push all registers +#define B_EBPMEM 0x00000030 // 16/32-bit int at [EBP] +#define B_SEG 0x00000031 // Segment register in Reg +#define B_SEGNOCS 0x00000032 // Segment register in Reg, but not CS +#define B_SEGCS 0x00000033 // Segment register CS +#define B_SEGDS 0x00000034 // Segment register DS +#define B_SEGES 0x00000035 // Segment register ES +#define B_SEGFS 0x00000036 // Segment register FS +#define B_SEGGS 0x00000037 // Segment register GS +#define B_SEGSS 0x00000038 // Segment register SS +#define B_ST 0x00000039 // 80-bit FPU register in last cmd byte +#define B_ST0 0x0000003A // 80-bit FPU register ST0 +#define B_ST1 0x0000003B // 80-bit FPU register ST1 +#define B_FLOAT32 0x0000003C // 32-bit float in ModRM, memory only +#define B_FLOAT64 0x0000003D // 64-bit float in ModRM, memory only +#define B_FLOAT80 0x0000003E // 80-bit float in ModRM, memory only +#define B_BCD 0x0000003F // 80-bit BCD in ModRM, memory only +#define B_MREG8x8 0x00000040 // MMX register as 8 8-bit integers +#define B_MMX8x8 0x00000041 // MMX reg/memory as 8 8-bit integers +#define B_MMX8x8DI 0x00000042 // MMX 8 8-bit integers at [DS:(E)DI] +#define B_MREG16x4 0x00000043 // MMX register as 4 16-bit integers +#define B_MMX16x4 0x00000044 // MMX reg/memory as 4 16-bit integers +#define B_MREG32x2 0x00000045 // MMX register as 2 32-bit integers +#define B_MMX32x2 0x00000046 // MMX reg/memory as 2 32-bit integers +#define B_MREG64 0x00000047 // MMX register as 1 64-bit integer +#define B_MMX64 0x00000048 // MMX reg/memory as 1 64-bit integer +#define B_3DREG 0x00000049 // 3DNow! register as 2 32-bit floats +#define B_3DNOW 0x0000004A // 3DNow! reg/memory as 2 32-bit floats +#define B_XMM0I32x4 0x0000004B // XMM0 as 4 32-bit integers +#define B_XMM0I64x2 0x0000004C // XMM0 as 2 64-bit integers +#define B_XMM0I8x16 0x0000004D // XMM0 as 16 8-bit integers +#define B_SREGF32x4 0x0000004E // SSE register as 4 32-bit floats +#define B_SREGF32L 0x0000004F // Low 32-bit float in SSE register +#define B_SREGF32x2L 0x00000050 // Low 2 32-bit floats in SSE register +#define B_SSEF32x4 0x00000051 // SSE reg/memory as 4 32-bit floats +#define B_SSEF32L 0x00000052 // Low 32-bit float in SSE reg/memory +#define B_SSEF32x2L 0x00000053 // Low 2 32-bit floats in SSE reg/memory +#define B_SREGF64x2 0x00000054 // SSE register as 2 64-bit floats +#define B_SREGF64L 0x00000055 // Low 64-bit float in SSE register +#define B_SSEF64x2 0x00000056 // SSE reg/memory as 2 64-bit floats +#define B_SSEF64L 0x00000057 // Low 64-bit float in SSE reg/memory +#define B_SREGI8x16 0x00000058 // SSE register as 16 8-bit sigints +#define B_SSEI8x16 0x00000059 // SSE reg/memory as 16 8-bit sigints +#define B_SSEI8x16DI 0x0000005A // SSE 16 8-bit sigints at [DS:(E)DI] +#define B_SSEI8x8L 0x0000005B // Low 8 8-bit ints in SSE reg/memory +#define B_SSEI8x4L 0x0000005C // Low 4 8-bit ints in SSE reg/memory +#define B_SSEI8x2L 0x0000005D // Low 2 8-bit ints in SSE reg/memory +#define B_SREGI16x8 0x0000005E // SSE register as 8 16-bit sigints +#define B_SSEI16x8 0x0000005F // SSE reg/memory as 8 16-bit sigints +#define B_SSEI16x4L 0x00000060 // Low 4 16-bit ints in SSE reg/memory +#define B_SSEI16x2L 0x00000061 // Low 2 16-bit ints in SSE reg/memory +#define B_SREGI32x4 0x00000062 // SSE register as 4 32-bit sigints +#define B_SREGI32L 0x00000063 // Low 32-bit sigint in SSE register +#define B_SREGI32x2L 0x00000064 // Low 2 32-bit sigints in SSE register +#define B_SSEI32x4 0x00000065 // SSE reg/memory as 4 32-bit sigints +#define B_SSEI32x2L 0x00000066 // Low 2 32-bit sigints in SSE reg/memory +#define B_SREGI64x2 0x00000067 // SSE register as 2 64-bit sigints +#define B_SSEI64x2 0x00000068 // SSE reg/memory as 2 64-bit sigints +#define B_SREGI64L 0x00000069 // Low 64-bit sigint in SSE register +#define B_EFL 0x0000006A // Flags register EFL +#define B_FLAGS8 0x0000006B // Flags (low byte) +#define B_OFFSET 0x0000006C // 16/32 const offset from next command +#define B_BYTEOFFS 0x0000006D // 8-bit sxt const offset from next cmd +#define B_FARCONST 0x0000006E // 16:16/16:32 absolute address constant +#define B_DESCR 0x0000006F // 16:32 descriptor in ModRM +#define B_1 0x00000070 // Immediate constant 1 +#define B_CONST8 0x00000071 // Immediate 8-bit constant +#define B_CONST8_2 0x00000072 // Immediate 8-bit const, second in cmd +#define B_CONST16 0x00000073 // Immediate 16-bit constant +#define B_CONST 0x00000074 // Immediate 8/16/32-bit constant +#define B_CONSTL 0x00000075 // Immediate 16/32-bit constant +#define B_SXTCONST 0x00000076 // Immediate 8-bit sign-extended to size +#define B_CR 0x00000077 // Control register in Reg +#define B_CR0 0x00000078 // Control register CR0 +#define B_DR 0x00000079 // Debug register in Reg +#define B_FST 0x0000007A // FPU status register +#define B_FCW 0x0000007B // FPU control register +#define B_MXCSR 0x0000007C // SSE media control and status register +#define B_SVEXF32x4 0x0000007D // SSE reg in VEX as 4 32-bit floats +#define B_SVEXF32L 0x0000007E // Low 32-bit float in SSE in VEX +#define B_SVEXF64x2 0x0000007F // SSE reg in VEX as 2 64-bit floats +#define B_SVEXF64L 0x00000080 // Low 64-bit float in SSE in VEX +#define B_SVEXI8x16 0x00000081 // SSE reg in VEX as 16 8-bit sigints +#define B_SVEXI16x8 0x00000082 // SSE reg in VEX as 8 16-bit sigints +#define B_SVEXI32x4 0x00000083 // SSE reg in VEX as 4 32-bit sigints +#define B_SVEXI64x2 0x00000084 // SSE reg in VEX as 2 64-bit sigints +#define B_SIMMI8x16 0x00000085 // SSE reg in immediate 8-bit constant +// Type modifiers, used for interpretation of contents, only one is allowed. +#define B_MODMASK 0x000F0000 // Mask to extract type modifier +#define B_NONSPEC 0x00000000 // Non-specific operand +#define B_UNSIGNED 0x00010000 // Decode as unsigned decimal +#define B_SIGNED 0x00020000 // Decode as signed decimal +#define B_BINARY 0x00030000 // Decode as binary (full hex) data +#define B_BITCNT 0x00040000 // Bit count +#define B_SHIFTCNT 0x00050000 // Shift count +#define B_COUNT 0x00060000 // General-purpose count +#define B_NOADDR 0x00070000 // Not an address +#define B_JMPCALL 0x00080000 // Near jump/call/return destination +#define B_JMPCALLFAR 0x00090000 // Far jump/call/return destination +#define B_STACKINC 0x000A0000 // Unsigned stack increment/decrement +#define B_PORT 0x000B0000 // I/O port +#define B_ADDR 0x000F0000 // Used internally +// Validity markers. +#define B_MEMORY 0x00100000 // Memory only, reg version different +#define B_REGISTER 0x00200000 // Register only, mem version different +#define B_MEMONLY 0x00400000 // Warn if operand in register +#define B_REGONLY 0x00800000 // Warn if operand in memory +#define B_32BITONLY 0x01000000 // Warn if 16-bit operand +#define B_NOESP 0x02000000 // ESP is not allowed +// Miscellaneous options. +#define B_NOVEXSIZE 0x04000000 // Always 128-bit SSE in 256-bit AVX +#define B_SHOWSIZE 0x08000000 // Always show argument size in disasm +#define B_CHG 0x10000000 // Changed, old contents is not used +#define B_UPD 0x20000000 // Modified using old contents +#define B_PSEUDO 0x40000000 // Pseoudooperand, not in assembler cmd +#define B_NOSEG 0x80000000 // Don't add offset of selector + +// Location of operand, only one bit is allowed. +#define OP_SOMEREG 0x000000FF // Mask for any kind of register +#define OP_REGISTER 0x00000001 // Operand is a general-purpose register +#define OP_SEGREG 0x00000002 // Operand is a segment register +#define OP_FPUREG 0x00000004 // Operand is a FPU register +#define OP_MMXREG 0x00000008 // Operand is a MMX register +#define OP_3DNOWREG 0x00000010 // Operand is a 3DNow! register +#define OP_SSEREG 0x00000020 // Operand is a SSE register +#define OP_CREG 0x00000040 // Operand is a control register +#define OP_DREG 0x00000080 // Operand is a debug register +#define OP_MEMORY 0x00000100 // Operand is in memory +#define OP_CONST 0x00000200 // Operand is an immediate constant +// Additional operand properties. +#define OP_PORT 0x00000400 // Used to access I/O port +#define OP_OTHERREG 0x00000800 // Special register like EFL or MXCSR +#define OP_INVALID 0x00001000 // Invalid operand, like reg in mem-only +#define OP_PSEUDO 0x00002000 // Pseudooperand (not in mnenonics) +#define OP_MOD 0x00004000 // Command may change/update operand +#define OP_MODREG 0x00008000 // Memory, but modifies reg (POP,MOVSD) +#define OP_IMPORT 0x00020000 // Value imported from different module +#define OP_SELECTOR 0x00040000 // Includes immediate selector +// Additional properties of memory address. +#define OP_INDEXED 0x00080000 // Memory address contains registers +#define OP_OPCONST 0x00100000 // Memory address contains constant +#define OP_ADDR16 0x00200000 // 16-bit memory address +#define OP_ADDR32 0x00400000 // Explicit 32-bit memory address + +#define DAMODE_MASM 0 // MASM assembling/disassembling style +#define DAMODE_IDEAL 1 // IDEAL assembling/disassembling style +#define DAMODE_HLA 2 // HLA assembling/disassembling style +#define DAMODE_ATT 3 // AT&T disassembling style + +#define NUM_STYLE 0x0003 // Mask to extract hex style +#define NUM_STD 0x0000 // 123, 12345678h, 0ABCD1234h +#define NUM_X 0x0001 // 123, 0x12345678, 0xABCD1234 +#define NUM_OLLY 0x0002 // 123., 12345678, 0ABCD1234 +#define NUM_LONG 0x0010 // 00001234h instead of 1234h +#define NUM_DECIMAL 0x0020 // 123 instead of 7Bh if under DECLIMIT + +// Disassembling options. +#define DA_TEXT 0x00000001 // Decode command to text and comment +#define DA_HILITE 0x00000002 // Use syntax highlighting +#define DA_JZ 0x00000004 // JZ, JNZ instead of JE, JNE +#define DA_JC 0x00000008 // JC, JNC instead of JAE, JB +#define DA_DUMP 0x00000020 // Dump command to hexadecimal text +#define DA_PSEUDO 0x00000400 // List pseudooperands + +// Disassembling errors. +#define DAE_NOERR 0x00000000 // No errors +#define DAE_BADCMD 0x00000001 // Unrecognized command +#define DAE_CROSS 0x00000002 // Command crosses end of memory block +#define DAE_MEMORY 0x00000004 // Register where only memory allowed +#define DAE_REGISTER 0x00000008 // Memory where only register allowed +#define DAE_LOCK 0x00000010 // LOCK prefix is not allowed +#define DAE_BADSEG 0x00000020 // Invalid segment register +#define DAE_SAMEPREF 0x00000040 // Two prefixes from the same group +#define DAE_MANYPREF 0x00000080 // More than 4 prefixes +#define DAE_BADCR 0x00000100 // Invalid CR register +#define DAE_INTERN 0x00000200 // Internal error + +// Disassembling warnings. +#define DAW_NOWARN 0x00000000 // No warnings +#define DAW_DATASIZE 0x00000001 // Superfluous data size prefix +#define DAW_ADDRSIZE 0x00000002 // Superfluous address size prefix +#define DAW_SEGPREFIX 0x00000004 // Superfluous segment override prefix +#define DAW_REPPREFIX 0x00000008 // Superfluous REPxx prefix +#define DAW_DEFSEG 0x00000010 // Segment prefix coincides with default +#define DAW_JMP16 0x00000020 // 16-bit jump, call or return +#define DAW_FARADDR 0x00000040 // Far jump or call +#define DAW_SEGMOD 0x00000080 // Modifies segment register +#define DAW_PRIV 0x00000100 // Privileged command +#define DAW_IO 0x00000200 // I/O command +#define DAW_SHIFT 0x00000400 // Shift out of range 1..31 +#define DAW_LOCK 0x00000800 // Command with valid LOCK prefix +#define DAW_STACK 0x00001000 // Unaligned stack operation +#define DAW_NOESP 0x00002000 // Suspicious use of stack pointer +#define DAW_RARE 0x00004000 // Rare, seldom used command +#define DAW_NONCLASS 0x00008000 // Non-standard or non-documented code +#define DAW_INTERRUPT 0x00010000 // Interrupt command + +// List of prefixes. +#define PF_SEGMASK 0x0000003F // Mask for segment override prefixes +#define PF_ES 0x00000001 // 0x26, ES segment override +#define PF_CS 0x00000002 // 0x2E, CS segment override +#define PF_SS 0x00000004 // 0x36, SS segment override +#define PF_DS 0x00000008 // 0x3E, DS segment override +#define PF_FS 0x00000010 // 0x64, FS segment override +#define PF_GS 0x00000020 // 0x65, GS segment override +#define PF_DSIZE 0x00000040 // 0x66, data size override +#define PF_ASIZE 0x00000080 // 0x67, address size override +#define PF_LOCK 0x00000100 // 0xF0, bus lock +#define PF_REPMASK 0x00000600 // Mask for repeat prefixes +#define PF_REPNE 0x00000200 // 0xF2, REPNE prefix +#define PF_REP 0x00000400 // 0xF3, REP/REPE prefix +#define PF_BYTE 0x00000800 // Size bit in command, used in cmdexec +#define PF_MUSTMASK D_MUSTMASK // Necessary prefixes, used in t_asmmod +#define PF_VEX2 0x00010000 // 2-byte VEX prefix +#define PF_VEX3 0x00020000 // 3-byte VEX prefix +// Useful shortcuts. +#define PF_66 PF_DSIZE // Alternative names for SSE prefixes +#define PF_F2 PF_REPNE +#define PF_F3 PF_REP +#define PF_HINT (PF_CS|PF_DS) // Alternative names for branch hints +#define PF_NOTTAKEN PF_CS +#define PF_TAKEN PF_DS +#define PF_VEX (PF_VEX2|PF_VEX3) + +typedef struct t_modrm { // ModRM byte decoding + ulong size; // Total size with SIB and disp, bytes + struct t_modrm *psib; // Pointer to SIB table or NULL + ulong dispsize; // Size of displacement or 0 if none + ulong features; // Operand features, set of OP_xxx + int reg; // Register index or REG_UNDEF + int defseg; // Default selector (SEG_xxx) + uchar scale[NREG]; // Scales of registers in memory address + ulong aregs; // List of registers used in address + int basereg; // Register used as base or REG_UNDEF + tchar ardec[SHORTNAME]; // Register part of address, INTEL fmt + tchar aratt[SHORTNAME]; // Register part of address, AT&T fmt +} t_modrm; + +typedef struct t_bincmd { // Description of 80x86 command + tchar *name; // Symbolic name for this command + ulong cmdtype; // Command's features, set of D_xxx + ulong exttype; // More features, set of DX_xxx + ulong length; // Length of main code (before ModRM/SIB) + ulong mask; // Mask for first 4 bytes of the command + ulong code; // Compare masked bytes with this + ulong postbyte; // Postbyte + ulong arg[NOPERAND]; // Types of arguments, set of B_xxx +} t_bincmd; + +typedef struct t_chain { // Element of command chain + const t_bincmd *pcmd; // Pointer to command descriptor or NULL + struct t_chain *pnext; // Pointer to next element in chain +} t_chain; + +typedef struct t_config { // Disassembler configuration + int disasmmode; // Main style, one of DAMODE_xxx + int memmode; // Constant part of address, NUM_xxx + int jmpmode; // Jump/call destination, NUM_xxx + int binconstmode; // Binary constants, NUM_xxx + int constmode; // Numeric constants, NUM_xxx + int lowercase; // Force lowercase display + int tabarguments; // Tab between mnemonic and arguments + int extraspace; // Extra space between arguments + int useretform; // Use RET instead of RETN + int shortstringcmds; // Use short form of string commands + int putdefseg; // Display default segments in listing + int showmemsize; // Always show memory size + int shownear; // Show NEAR modifiers + int ssesizemode; // How to decode size of SSE operands + int jumphintmode; // How to decode jump hints + int sizesens; // How to decode size-sensitive mnemonics + int simplifiedst; // How to decode top of FPU stack + int hiliteoperands; // Highlight operands +} t_config; + +typedef struct t_operand { // Description of disassembled operand + // Description of operand. + ulong features; // Operand features, set of OP_xxx + ulong arg; // Operand type, set of B_xxx +// int optype; // DEC_INT, DEC_FLOAT or DEC_UNKNOWN + int opsize; // Total size of data, bytes + int granularity; // Size of element (opsize exc. MMX/SSE) + int reg; // REG_xxx (also ESP in POP) or REG_UNDEF + ulong uses; // List of used regs (not in address!) + ulong modifies; // List of modified regs (not in addr!) + // Description of memory address. + int seg; // Selector (SEG_xxx) + uchar scale[NREG]; // Scales of registers in memory address + ulong aregs; // List of registers used in address + ulong opconst; // Constant or const part of address + ulong selector; // Immediate selector in far jump/call + // Textual decoding. + tchar text[TEXTLEN]; // Operand, decoded to text +} t_operand; + +// Note that used registers are those which contents is necessary to create +// result. Modified registers are those which value is changed. For example, +// command MOV EAX,[EBX+ECX] uses EBX and ECX and modifies EAX. Command +// ADD ESI,EDI uses ESI and EDI and modifies ESI. +typedef struct t_disasm { // Disassembled command + ulong ip; // Address of first command byte + ulong size; // Full length of command, bytes + ulong cmdtype; // Type of command, D_xxx + ulong exttype; // More features, set of DX_xxx + ulong prefixes; // List of prefixes, set of PF_xxx + ulong nprefix; // Number of prefixes, including SSE2 + ulong memfixup; // Offset of first 4-byte fixup or -1 + ulong immfixup; // Offset of second 4-byte fixup or -1 + int errors; // Set of DAE_xxx + int warnings; // Set of DAW_xxx + ulong uses; // List of used registers + ulong modifies; // List of modified registers + ulong memconst; // Constant in memory address or 0 + ulong stackinc; // Data size in ENTER/RETN/RETF + t_operand op[NOPERAND]; // Operands + tchar dump[TEXTLEN]; // Hex dump of the command + tchar result[TEXTLEN]; // Fully decoded command as text + uchar mask[TEXTLEN]; // Mask to highlight result + int masksize; // Length of mask corresponding to result +} t_disasm; + +extern t_modrm modrm16[256]; // 16-bit ModRM decodings +extern t_modrm modrm32[256]; // 32-bit ModRM decodings without SIB +extern t_modrm sib0[256]; // ModRM-SIB decodings with Mod=00 +extern t_modrm sib1[256]; // ModRM-SIB decodings with Mod=01 +extern t_modrm sib2[256]; // ModRM-SIB decodings with Mod=10 + +extern const t_bincmd bincmd[]; // List of 80x86 commands +extern t_chain *cmdchain; // Commands sorted by first CMDMASK bits + +int Preparedisasm(void); +void Finishdisasm(void); + +ulong Disasm(uchar const *cmd,ulong cmdsize,ulong cmdip, + t_disasm *da,int cmdmode,t_config *cmdconfig, + int (*decodeaddress)(tchar *s,ulong addr)); +tchar *Geterrwarnmessage(ulong errors,ulong warnings); + diff --git a/Include/dxwnd.h b/Include/dxwnd.h index b93d3fc..cfbb4aa 100644 --- a/Include/dxwnd.h +++ b/Include/dxwnd.h @@ -124,6 +124,7 @@ #define NOPOWER2FIX 0x00000100 // Handle textures whose size is not a power of 2 (32, 64, 128 ...) #define NOPERFCOUNTER 0x00000200 // Disables the GetPerfCounter performance metrics API,as if it was not supported.... #define ADDPROXYLIBS 0x00000400 // Add proxy libs to otherwise hook-resilient system libraries (e.g. d3d9.dll) +#define INTERCEPTRDTSC 0x00000800 // Intercapts RDTSC opcodes to hook at assembly level // logging Tflags DWORD: #define OUTTRACE 0x00000001 // enables tracing to dxwnd.log in general diff --git a/build/Disasm.dll b/build/Disasm.dll new file mode 100644 index 0000000..b9c3542 --- /dev/null +++ b/build/Disasm.dll @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:f413a207787da88281500aaeae07fb98d7d438ecb4d67f8fcdf0aff2f988717f +size 138752 diff --git a/build/d3d9.dll b/build/d3d9.dll index 358b5d6..91a98d9 100644 --- a/build/d3d9.dll +++ b/build/d3d9.dll @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:bbba59e9978c6b6bbab608afb2d58ca5946c5a5dd80760539334f53b7f42f2ef +oid sha256:9ddc18c4773ec0f8981f5d14895d303d8c4197b3768400b7fb281aa5954c1cfd size 108544 diff --git a/build/dxwnd.dll b/build/dxwnd.dll index 0c7e910..d746fa5 100644 --- a/build/dxwnd.dll +++ b/build/dxwnd.dll @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:86344285657229fd81bf32b0431d3b4834a62cf91d50f521dd84035670bd8c9d -size 435200 +oid sha256:5bb7397123c001be9c2787f7e9eda53c0dcfb9077fac2cc5107e0598a37e96b6 +size 438784 diff --git a/build/dxwnd.exe b/build/dxwnd.exe index 8316ab5..8021441 100644 --- a/build/dxwnd.exe +++ b/build/dxwnd.exe @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:344f365f6f431bb76c4c42f14654160bdc40c065462b4c8c45a0f3c2ab266a70 +oid sha256:41a91cd3edf9a9dfce166c8da6de6d4967d027ec4aa9acf8560a0c996ff46f4d size 533504 diff --git a/build/dxwnd.ini b/build/dxwnd.ini index b450b3a..9327504 100644 --- a/build/dxwnd.ini +++ b/build/dxwnd.ini @@ -114,17 +114,17 @@ sizx4=800 sizy4=600 maxfps4=0 initts4=0 -title5=Ancient Evil (DEMO) -path5=D:\Games\Ancient Evil (Demo)\aecsc-demo.exe +title5=Amerzone +path5=D:\Games\Amerzone\amerzone.exe module5= opengllib5= ver5=0 coord5=0 -flag5=203440160 -flagg5=134217744 +flag5=134234114 +flagg5=1207959568 flagh5=20 -flagi5=0 -tflag5=258 +flagi5=4 +tflag5=0 initx5=0 inity5=0 minx5=0 @@ -137,17 +137,17 @@ sizx5=800 sizy5=600 maxfps5=0 initts5=0 -title6=Army Men RTS -path6=D:\Games\Army Men RTS\amrts.exe +title6=Ancient Evil (DEMO) +path6=D:\Games\Ancient Evil (Demo)\aecsc-demo.exe module6= opengllib6= ver6=0 coord6=0 -flag6=671105060 -flagg6=1207959552 +flag6=203440160 +flagg6=134217744 flagh6=20 -flagi6=4 -tflag6=0 +flagi6=0 +tflag6=258 initx6=0 inity6=0 minx6=0 @@ -160,17 +160,17 @@ sizx6=800 sizy6=600 maxfps6=0 initts6=0 -title7=Beavis & Butthead Do U. -path7=D:\Games\B_b\BEAVIS.EXE +title7=Army Men RTS +path7=D:\Games\Army Men RTS\amrts.exe module7= opengllib7= ver7=0 coord7=0 -flag7=671090722 +flag7=671105060 flagg7=1207959552 -flagh7=32788 -flagi7=0 -tflag7=2 +flagh7=20 +flagi7=4 +tflag7=0 initx7=0 inity7=0 minx7=0 @@ -183,17 +183,17 @@ sizx7=800 sizy7=600 maxfps7=0 initts7=0 -title8=Black & White -path8=D:\Games\Black & White\runblack.exe +title8=Beavis & Butthead Do U. +path8=D:\Games\B_b\BEAVIS.EXE module8= opengllib8= ver8=0 -coord8=1 -flag8=679477280 -flagg8=1207959568 -flagh8=20 -flagi8=4 -tflag8=258 +coord8=0 +flag8=671090722 +flagg8=1207959552 +flagh8=32788 +flagi8=0 +tflag8=2 initx8=0 inity8=0 minx8=0 @@ -206,15 +206,15 @@ sizx8=800 sizy8=600 maxfps8=0 initts8=0 -title9=Bunnies must die -path9=D:\Games\Bunnies must die\bmd.exe +title9=Black & White +path9=D:\Games\Black & White\runblack.exe module9= opengllib9= -ver9=1 -coord9=0 -flag9=142606370 -flagg9=1744830465 -flagh9=65556 +ver9=0 +coord9=1 +flag9=679477280 +flagg9=1207959568 +flagh9=20 flagi9=4 tflag9=258 initx9=0 @@ -229,16 +229,16 @@ sizx9=800 sizy9=600 maxfps9=0 initts9=0 -title10=Carmageddon 2 (GLIDE) -path10=D:\Games\Carmageddon_2\carma2_HW.exe +title10=Bomberbabe +path10=D:\Games\Ludonic\Bomberbabe.exe module10= opengllib10= ver10=0 coord10=0 -flag10=134217730 -flagg10=1208025088 +flag10=671088674 +flagg10=1207959552 flagh10=20 -flagi10=12 +flagi10=4 tflag10=0 initx10=0 inity10=0 @@ -252,17 +252,17 @@ sizx10=800 sizy10=600 maxfps10=0 initts10=0 -title11=Carmageddon 2 (SW) -path11=D:\Games\Carmageddon_2\carma2_SW.exe +title11=Bunnies must die +path11=D:\Games\Bunnies must die\bmd.exe module11= opengllib11= -ver11=0 +ver11=1 coord11=0 -flag11=671088674 -flagg11=1208025088 -flagh11=33562644 -flagi11=12 -tflag11=0 +flag11=142606370 +flagg11=1744830465 +flagh11=65556 +flagi11=4 +tflag11=258 initx11=0 inity11=0 minx11=0 @@ -275,16 +275,16 @@ sizx11=800 sizy11=600 maxfps11=0 initts11=0 -title12=Cave Story -path12=D:\Games\Cave Story\Doukutsu.exe +title12=Carmageddon 2 (GLIDE) +path12=D:\Games\Carmageddon_2\carma2_HW.exe module12= opengllib12= ver12=0 coord12=0 -flag12=134217762 -flagg12=1207959552 +flag12=134217730 +flagg12=1208025088 flagh12=20 -flagi12=4 +flagi12=12 tflag12=0 initx12=0 inity12=0 @@ -298,17 +298,17 @@ sizx12=800 sizy12=600 maxfps12=0 initts12=0 -title13=Crimson Skies -path13=D:\Games\Crimson_Skies\crimson.exe +title13=Carmageddon 2 (SW) +path13=D:\Games\Carmageddon_2\carma2_SW.exe module13= opengllib13= -ver13=7 +ver13=0 coord13=0 -flag13=134234148 -flagg13=-939524096 -flagh13=20 -flagi13=36 -tflag13=259 +flag13=671088674 +flagg13=1208025088 +flagh13=33562644 +flagi13=12 +tflag13=0 initx13=0 inity13=0 minx13=0 @@ -321,17 +321,17 @@ sizx13=800 sizy13=600 maxfps13=0 initts13=0 -title14=Daikatana -path14=D:\Games\Daikatana\daikatana.exe +title14=Cave Story +path14=D:\Games\Cave Story\Doukutsu.exe module14= opengllib14= -ver14=12 +ver14=0 coord14=0 -flag14=269492742 -flagg14=537002497 +flag14=134217762 +flagg14=1207959552 flagh14=20 -flagi14=0 -tflag14=2 +flagi14=4 +tflag14=0 initx14=0 inity14=0 minx14=0 @@ -344,17 +344,17 @@ sizx14=800 sizy14=600 maxfps14=0 initts14=0 -title15=Devastation -path15=D:\Games\Devastation\System\Devastation.exe +title15=Crimson Skies +path15=D:\Games\Crimson_Skies\crimson.exe module15= opengllib15= -ver15=0 +ver15=7 coord15=0 -flag15=167772198 -flagg15=1209008128 -flagh15=65556 -flagi15=2 -tflag15=322 +flag15=134234148 +flagg15=-939524096 +flagh15=20 +flagi15=36 +tflag15=259 initx15=0 inity15=0 minx15=0 @@ -363,21 +363,21 @@ maxx15=0 maxy15=0 posx15=50 posy15=50 -sizx15=320 -sizy15=240 +sizx15=800 +sizy15=600 maxfps15=0 initts15=0 -title16=Doom Shareware for Windows 95 -path16=D:\Games\Doom Shareware for Windows 95\Doom95.exe +title16=Daikatana +path16=D:\Games\Daikatana\daikatana.exe module16= opengllib16= -ver16=0 -coord16=2 -flag16=134217762 -flagg16=1207959568 +ver16=12 +coord16=0 +flag16=269492742 +flagg16=537002497 flagh16=20 flagi16=0 -tflag16=0 +tflag16=2 initx16=0 inity16=0 minx16=0 @@ -390,17 +390,17 @@ sizx16=800 sizy16=600 maxfps16=0 initts16=0 -title17=Duckman -path17=D:\Games\Duckman\DUCKMAN.EXE +title17=Devastation +path17=D:\Games\Devastation\System\Devastation.exe module17= opengllib17= ver17=0 coord17=0 -flag17=134217762 +flag17=167772198 flagg17=1209008128 -flagh17=33554452 -flagi17=4 -tflag17=3 +flagh17=65556 +flagi17=2 +tflag17=322 initx17=0 inity17=0 minx17=0 @@ -409,21 +409,21 @@ maxx17=0 maxy17=0 posx17=50 posy17=50 -sizx17=800 -sizy17=600 +sizx17=320 +sizy17=240 maxfps17=0 initts17=0 -title18=Dungeon Keeper 2 (GOG) -path18=D:\Games\Dungeon Keeper 2 (GOG)\DKII.EXE +title18=Doom Shareware for Windows 95 +path18=D:\Games\Doom Shareware for Windows 95\Doom95.exe module18= opengllib18= ver18=0 -coord18=0 -flag18=136331298 -flagg18=1241513984 +coord18=2 +flag18=134217762 +flagg18=1207959568 flagh18=20 flagi18=0 -tflag18=258 +tflag18=0 initx18=0 inity18=0 minx18=0 @@ -436,17 +436,17 @@ sizx18=800 sizy18=600 maxfps18=0 initts18=0 -title19=Empire Earth -path19=D:\Games\Empire Earth\Empire Earth.exe +title19=Duckman +path19=D:\Games\Duckman\DUCKMAN.EXE module19= opengllib19= ver19=0 coord19=0 -flag19=-1459617632 -flagg19=201326848 -flagh19=84 -flagi19=0 -tflag19=262 +flag19=134217762 +flagg19=1209008128 +flagh19=33554452 +flagi19=4 +tflag19=3 initx19=0 inity19=0 minx19=0 @@ -455,21 +455,21 @@ maxx19=0 maxy19=0 posx19=50 posy19=50 -sizx19=0 -sizy19=0 +sizx19=800 +sizy19=600 maxfps19=0 initts19=0 -title20=F-16 Fighting Falcon -path20=D:\Games\F16\f1695.exe +title20=Duke Nukem 3D +path20=D:\Games\Duke3d\DUKE3D.EXE module20= opengllib20= ver20=0 coord20=0 -flag20=134217826 -flagg20=1209008128 +flag20=134217762 +flagg20=1207959552 flagh20=20 flagi20=4 -tflag20=258 +tflag20=0 initx20=0 inity20=0 minx20=0 @@ -482,17 +482,17 @@ sizx20=800 sizy20=600 maxfps20=0 initts20=0 -title21=Fate -path21=D:\Games\Fate\Fate.exe +title21=Dungeon Keeper 2 (GOG) +path21=D:\Games\Dungeon Keeper 2 (GOG)\DKII.EXE module21= opengllib21= ver21=0 coord21=0 -flag21=134217762 -flagg21=1207959552 +flag21=136331298 +flagg21=1241513984 flagh21=20 -flagi21=4 -tflag21=0 +flagi21=0 +tflag21=258 initx21=0 inity21=0 minx21=0 @@ -505,14 +505,14 @@ sizx21=800 sizy21=600 maxfps21=0 initts21=0 -title22=Gangsters -path22=D:\Games\Gangsters\gangsters.exe +title22=Dungeon Lords MMXII +path22=D:\Games\Dungeon Lords MMXII\dlords2012.exe module22= opengllib22= ver22=0 coord22=0 -flag22=1208483874 -flagg22=1209008128 +flag22=134217762 +flagg22=1207959552 flagh22=20 flagi22=4 tflag22=0 @@ -528,17 +528,17 @@ sizx22=800 sizy22=600 maxfps22=0 initts22=0 -title23=Grand Prix Legends -path23=D:\Games\gpl\gpl.exe +title23=Empire Earth +path23=D:\Games\Empire Earth\Empire Earth.exe module23= opengllib23= ver23=0 coord23=0 -flag23=679485472 -flagg23=-939524096 -flagh23=20 -flagi23=4 -tflag23=0 +flag23=-1459617632 +flagg23=201326848 +flagh23=84 +flagi23=0 +tflag23=262 initx23=0 inity23=0 minx23=0 @@ -547,18 +547,18 @@ maxx23=0 maxy23=0 posx23=50 posy23=50 -sizx23=800 -sizy23=600 +sizx23=0 +sizy23=0 maxfps23=0 initts23=0 -title24=GTA 3 -path24=D:\Games\GTA3\gta3.exe +title24=F-16 Fighting Falcon +path24=D:\Games\F16\f1695.exe module24= opengllib24= ver24=0 coord24=0 -flag24=134217762 -flagg24=1207959552 +flag24=134217826 +flagg24=1209008128 flagh24=20 flagi24=4 tflag24=258 @@ -574,17 +574,17 @@ sizx24=800 sizy24=600 maxfps24=0 initts24=0 -title25=Hearts of Iron 2 -path25=D:\Games\Hearts of Iron 2\HoI2.exe +title25=Fate +path25=D:\Games\Fate\Fate.exe module25= opengllib25= ver25=0 -coord25=2 -flag25=939526179 -flagg25=1207959568 -flagh25=32788 -flagi25=2 -tflag25=2 +coord25=0 +flag25=134217762 +flagg25=1207959552 +flagh25=20 +flagi25=4 +tflag25=0 initx25=0 inity25=0 minx25=0 @@ -597,17 +597,17 @@ sizx25=800 sizy25=600 maxfps25=0 initts25=0 -title26=Heroes of Might and Magic IV -path26=D:\Games\Heroes of Might and Magic IV\heroes4.exe +title26=Fighting Force +path26=D:\Games\Fighting Force\game\fforce.exe module26= opengllib26= ver26=0 -coord26=2 -flag26=671350818 -flagg26=1207959568 -flagh26=-2147418092 -flagi26=1 -tflag26=258 +coord26=0 +flag26=134217824 +flagg26=1207959552 +flagh26=20 +flagi26=4 +tflag26=6163 initx26=0 inity26=0 minx26=0 @@ -620,17 +620,17 @@ sizx26=800 sizy26=600 maxfps26=0 initts26=0 -title27=Hitman - Codename 47 -path27=D:\Games\Hitman - Codename 47\Hitman.Exe +title27=Gangsters +path27=D:\Games\Gangsters\gangsters.exe module27= opengllib27= -ver27=1 +ver27=0 coord27=0 -flag27=134234144 -flagg27=1207959808 +flag27=1208483874 +flagg27=1209008128 flagh27=20 flagi27=4 -tflag27=2 +tflag27=0 initx27=0 inity27=0 minx27=0 @@ -643,14 +643,14 @@ sizx27=800 sizy27=600 maxfps27=0 initts27=0 -title28=Hitman 2 Silent Assassin -path28=D:\Games\Hitman 2 Silent Assassin\hitman2.exe +title28=Grand Prix Legends +path28=D:\Games\gpl\gpl.exe module28= opengllib28= ver28=0 -coord28=2 -flag28=134234150 -flagg28=1207959568 +coord28=0 +flag28=679485472 +flagg28=-939524096 flagh28=20 flagi28=4 tflag28=0 @@ -666,15 +666,15 @@ sizx28=800 sizy28=600 maxfps28=0 initts28=0 -title29=Homeworld 2 -path29=D:\Games\Homeworld2\Bin\Release\Homeworld2.exe +title29=Grand Prix World +path29=D:\Games\Grand Prix World\gpwxp2.exe module29= opengllib29= ver29=0 coord29=0 -flag29=671154178 -flagg29=134217728 -flagh29=285 +flag29=134217762 +flagg29=135266432 +flagh29=20 flagi29=0 tflag29=0 initx29=0 @@ -689,17 +689,17 @@ sizx29=800 sizy29=600 maxfps29=0 initts29=0 -title30=Imperialism -path30=D:\Games\Imperialism\Imperialism.exe +title30=GTA 3 +path30=D:\Games\GTA3\gta3.exe module30= opengllib30= ver30=0 coord30=0 -flag30=-1467998174 -flagg30=1209008128 +flag30=134217762 +flagg30=1207959552 flagh30=20 flagi30=4 -tflag30=0 +tflag30=258 initx30=0 inity30=0 minx30=0 @@ -712,17 +712,17 @@ sizx30=800 sizy30=600 maxfps30=0 initts30=0 -title31=Imperialism II -path31=D:\Games\Imperialism 2\imperialism II.exe +title31=Hearts of Iron 2 +path31=D:\Games\Hearts of Iron 2\HoI2.exe module31= opengllib31= ver31=0 -coord31=0 -flag31=679485474 -flagg31=1209008128 -flagh31=20 -flagi31=4 -tflag31=0 +coord31=2 +flag31=939526179 +flagg31=1207959568 +flagh31=32788 +flagi31=2 +tflag31=2 initx31=0 inity31=0 minx31=0 @@ -735,16 +735,16 @@ sizx31=800 sizy31=600 maxfps31=0 initts31=0 -title32=International Football 2000 -path32=D:\Games\International Football 2000\MSIF2000.ICD +title32=Heroes of Might and Magic IV +path32=D:\Games\Heroes of Might and Magic IV\heroes4.exe module32= opengllib32= ver32=0 -coord32=0 -flag32=150994976 -flagg32=1207959552 -flagh32=20 -flagi32=4 +coord32=2 +flag32=671350818 +flagg32=1207959568 +flagh32=-2147418092 +flagi32=1 tflag32=258 initx32=0 inity32=0 @@ -758,17 +758,17 @@ sizx32=800 sizy32=600 maxfps32=0 initts32=0 -title33=Jet Moto -path33=D:\Games\Jet_Moto\JETMOTO.EXE +title33=Hitman - Codename 47 +path33=D:\Games\Hitman - Codename 47\Hitman.Exe module33= opengllib33= -ver33=0 +ver33=1 coord33=0 -flag33=671088674 -flagg33=1207959568 +flag33=134234144 +flagg33=1207959808 flagh33=20 -flagi33=0 -tflag33=0 +flagi33=4 +tflag33=2 initx33=0 inity33=0 minx33=0 @@ -781,17 +781,17 @@ sizx33=800 sizy33=600 maxfps33=0 initts33=0 -title34=KISS Pinball -path34=D:\Games\KISS Pinball\kisspin.exe +title34=Hitman 2 Silent Assassin +path34=D:\Games\Hitman 2 Silent Assassin\hitman2.exe module34= opengllib34= -ver34=1 -coord34=0 -flag34=679616546 -flagg34=1207959552 -flagh34=98324 +ver34=0 +coord34=2 +flag34=134234150 +flagg34=1207959568 +flagh34=20 flagi34=4 -tflag34=259 +tflag34=0 initx34=0 inity34=0 minx34=0 @@ -804,17 +804,17 @@ sizx34=800 sizy34=600 maxfps34=0 initts34=0 -title35=Kiss Psycho Circus -path35=D:\Games\Kiss\client.exe +title35=Homeworld 2 +path35=D:\Games\Homeworld2\Bin\Release\Homeworld2.exe module35= opengllib35= ver35=0 coord35=0 -flag35=134234148 -flagg35=-939523840 -flagh35=20 -flagi35=16 -tflag35=2 +flag35=671154178 +flagg35=134217728 +flagh35=285 +flagi35=0 +tflag35=0 initx35=0 inity35=0 minx35=0 @@ -827,17 +827,17 @@ sizx35=800 sizy35=600 maxfps35=0 initts35=0 -title36=Knights Of Honor -path36=D:\Games\Knights Of Honor\KoH.exe +title36=Imperialism +path36=D:\Games\Imperialism\Imperialism.exe module36= opengllib36= ver36=0 coord36=0 -flag36=-402382814 -flagg36=1207959552 -flagh36=65556 +flag36=-1467998174 +flagg36=1209008128 +flagh36=20 flagi36=4 -tflag36=6431 +tflag36=0 initx36=0 inity36=0 minx36=0 @@ -850,17 +850,17 @@ sizx36=800 sizy36=600 maxfps36=0 initts36=0 -title37=KnightShift -path37=D:\Games\knightshift\KnightShift.ex1 +title37=Imperialism II +path37=D:\Games\Imperialism 2\imperialism II.exe module37= opengllib37= -ver37=8 +ver37=0 coord37=0 -flag37=134217760 -flagg37=1207959552 +flag37=679485474 +flagg37=1209008128 flagh37=20 flagi37=4 -tflag37=3 +tflag37=0 initx37=0 inity37=0 minx37=0 @@ -873,17 +873,17 @@ sizx37=800 sizy37=600 maxfps37=0 initts37=0 -title38=Kohan II Kings of War -path38=D:\Games\Kohan II Kings of War\k2.exe +title38=International Football 2000 +path38=D:\Games\International Football 2000\MSIF2000.ICD module38= opengllib38= ver38=0 coord38=0 -flag38=134217762 +flag38=150994976 flagg38=1207959552 flagh38=20 -flagi38=1028 -tflag38=6163 +flagi38=4 +tflag38=258 initx38=0 inity38=0 minx38=0 @@ -896,17 +896,17 @@ sizx38=800 sizy38=600 maxfps38=0 initts38=0 -title39=L.E.D. Wars (not working) -path39=D:\Games\l.e.d._wars\LED.EXE +title39=Jet Moto +path39=D:\Games\Jet_Moto\JETMOTO.EXE module39= opengllib39= ver39=0 coord39=0 -flag39=713039906 -flagg39=1744830481 -flagh39=65556 -flagi39=4 -tflag39=258 +flag39=671088674 +flagg39=1207959568 +flagh39=20 +flagi39=0 +tflag39=0 initx39=0 inity39=0 minx39=0 @@ -919,17 +919,17 @@ sizx39=800 sizy39=600 maxfps39=0 initts39=0 -title40=Land of the Dead -path40=D:\Games\Land of the Dead\System\LOTD.exe +title40=KISS Pinball +path40=D:\Games\KISS Pinball\kisspin.exe module40= opengllib40= -ver40=0 -coord40=2 -flag40=134217766 -flagg40=1207959568 -flagh40=20 -flagi40=0 -tflag40=64 +ver40=1 +coord40=0 +flag40=679616546 +flagg40=1207959552 +flagh40=98324 +flagi40=4 +tflag40=259 initx40=0 inity40=0 minx40=0 @@ -942,17 +942,17 @@ sizx40=800 sizy40=600 maxfps40=0 initts40=0 -title41=Last Bronx -path41=D:\Games\Last_Bronx\LB.EXE +title41=Kiss Psycho Circus +path41=D:\Games\Kiss\client.exe module41= opengllib41= ver41=0 coord41=0 -flag41=134217762 -flagg41=-939520000 +flag41=134234148 +flagg41=-939523840 flagh41=20 -flagi41=4 -tflag41=0 +flagi41=16 +tflag41=2 initx41=0 inity41=0 minx41=0 @@ -963,19 +963,19 @@ posx41=50 posy41=50 sizx41=800 sizy41=600 -maxfps41=20 -initts41=4 -title42=LEGO® Marvel Super Heroes Demo -path42=C:\Program Files (x86)\Warner Bros. Interactive Entertainment\LEGO® Marvel Super Heroes Demo\LEGOMarvelDemo.exe +maxfps41=0 +initts41=0 +title42=Knights Of Honor +path42=D:\Games\Knights Of Honor\KoH.exe module42= opengllib42= ver42=0 coord42=0 -flag42=134217762 +flag42=-402382814 flagg42=1207959552 -flagh42=20 +flagh42=65556 flagi42=4 -tflag42=0 +tflag42=6431 initx42=0 inity42=0 minx42=0 @@ -988,17 +988,17 @@ sizx42=800 sizy42=600 maxfps42=0 initts42=0 -title43=Lords of the Realm 2 -path43=D:\Games\Lords of the Realm 2\LORDS2.EXE +title43=KnightShift +path43=D:\Games\knightshift\KnightShift.ex1 module43= opengllib43= -ver43=0 +ver43=8 coord43=0 -flag43=134217762 -flagg43=1209008128 -flagh43=65556 +flag43=134217760 +flagg43=1207959552 +flagh43=20 flagi43=4 -tflag43=0 +tflag43=3 initx43=0 inity43=0 minx43=0 @@ -1011,17 +1011,17 @@ sizx43=800 sizy43=600 maxfps43=0 initts43=0 -title44=Mageslayer -path44=D:\Games\MAGE\MAGESLAY.EXE +title44=Kohan II Kings of War +path44=D:\Games\Kohan II Kings of War\k2.exe module44= opengllib44= -ver44=0 +ver44=9 coord44=0 -flag44=136314914 -flagg44=1476395008 +flag44=134217762 +flagg44=1207959552 flagh44=20 -flagi44=1 -tflag44=83 +flagi44=1028 +tflag44=6163 initx44=0 inity44=0 minx44=0 @@ -1034,17 +1034,17 @@ sizx44=800 sizy44=600 maxfps44=0 initts44=0 -title45=Magic & Mayhem -path45=D:\Games\Magic_&_Mayhem\Chaos.exe +title45=L.E.D. Wars (not working) +path45=D:\Games\l.e.d._wars\LED.EXE module45= opengllib45= -ver45=0 +ver45=1 coord45=0 -flag45=134217762 -flagg45=1207959552 -flagh45=20 +flag45=679477282 +flagg45=1744830480 +flagh45=65556 flagi45=4 -tflag45=0 +tflag45=258 initx45=0 inity45=0 minx45=0 @@ -1057,17 +1057,17 @@ sizx45=800 sizy45=600 maxfps45=0 initts45=0 -title46=Motocross Madness (DEMO) -path46=D:\Games\Motocross Madness Trial\mcm.exe +title46=Land of the Dead +path46=D:\Games\Land of the Dead\System\LOTD.exe module46= opengllib46= ver46=0 -coord46=0 -flag46=134217760 -flagg46=1207959552 +coord46=2 +flag46=134217766 +flagg46=1207959568 flagh46=20 flagi46=0 -tflag46=0 +tflag46=64 initx46=0 inity46=0 minx46=0 @@ -1080,14 +1080,14 @@ sizx46=800 sizy46=600 maxfps46=0 initts46=0 -title47=Pandemonium 2 (GLIDE) -path47=D:\Games\Pandemonium 2\pandy.exe +title47=Last Bronx +path47=D:\Games\Last_Bronx\LB.EXE module47= opengllib47= ver47=0 coord47=0 flag47=134217762 -flagg47=1207959552 +flagg47=-939520000 flagh47=20 flagi47=4 tflag47=0 @@ -1101,10 +1101,10 @@ posx47=50 posy47=50 sizx47=800 sizy47=600 -maxfps47=0 -initts47=0 -title48=Panzer Dragoon -path48=D:\Games\Panzer Dragoon\game\PANZERDG.EXE +maxfps47=20 +initts47=4 +title48=LEGO® Marvel Super Heroes Demo +path48=C:\Program Files (x86)\Warner Bros. Interactive Entertainment\LEGO® Marvel Super Heroes Demo\LEGOMarvelDemo.exe module48= opengllib48= ver48=0 @@ -1113,7 +1113,7 @@ flag48=134217762 flagg48=1207959552 flagh48=20 flagi48=4 -tflag48=67 +tflag48=0 initx48=0 inity48=0 minx48=0 @@ -1126,17 +1126,17 @@ sizx48=800 sizy48=600 maxfps48=0 initts48=0 -title49=Praetorians -path49=D:\games\Praetorians\Praetorians.exe +title49=L'Elefante a Strisce +path49=D:\Games\L'Elefante a Strisce\Pilots1I.EXE module49= opengllib49= ver49=0 -coord49=2 -flag49=134217760 -flagg49=1209008144 -flagh49=22 -flagi49=4 -tflag49=2 +coord49=0 +flag49=134217762 +flagg49=135266368 +flagh49=20 +flagi49=0 +tflag49=64 initx49=0 inity49=0 minx49=0 @@ -1149,16 +1149,16 @@ sizx49=800 sizy49=600 maxfps49=0 initts49=0 -title50=Praetorians (DEMO) -path50=D:\Games\Praetorians Demo\Praetorians.exe +title50=Lords of Magic Special Edition +path50=D:\Games\LoM\SIERRA\LOMSE\lomse.exe module50= opengllib50= ver50=0 coord50=0 -flag50=150994976 -flagg50=1209008128 -flagh50=65556 -flagi50=4 +flag50=402669603 +flagg50=1207959568 +flagh50=6291476 +flagi50=0 tflag50=6419 initx50=0 inity50=0 @@ -1172,19 +1172,19 @@ sizx50=800 sizy50=600 maxfps50=0 initts50=0 -title51=Primitive Wars +title51=Lords of the Realm 2 module51= opengllib51= -title52=Project IGI +title52=Lost Valley module52= opengllib52= -path51=D:\Games\Primitive Wars\Pw.exe +path51=D:\Games\Lords of the Realm 2\LORDS2.EXE ver51=0 coord51=0 -flag51=671088674 -flagg51=134217728 -flagh51=20 -flagi51=0 +flag51=134217762 +flagg51=1209008128 +flagh51=65556 +flagi51=4 tflag51=0 initx51=0 inity51=0 @@ -1198,14 +1198,14 @@ sizx51=800 sizy51=600 maxfps51=0 initts51=0 -path52=D:\Games\Project IGI\pc\IGI.exe +path52=D:\Games\Lost Valley\lost valley\lost valley data.exe ver52=0 coord52=0 -flag52=671105060 -flagg52=-939524096 -flagh52=20 -flagi52=4 -tflag52=67 +flag52=679485474 +flagg52=1207959552 +flagh52=-2080374764 +flagi52=0 +tflag52=0 initx52=0 inity52=0 minx52=0 @@ -1218,17 +1218,17 @@ sizx52=800 sizy52=600 maxfps52=0 initts52=0 -title53=Project Nomads (DEMO) -path53=D:\Games\Project Nomads Demo\bin\win32\nomads.exe +title53=Mageslayer +path53=D:\Games\MAGE\MAGESLAY.EXE module53= opengllib53= -ver53=8 +ver53=0 coord53=0 -flag53=-1476394974 -flagg53=1207959808 -flagh53=4 -flagi53=0 -tflag53=274 +flag53=136314914 +flagg53=1476395008 +flagh53=20 +flagi53=1 +tflag53=83 initx53=0 inity53=0 minx53=0 @@ -1241,17 +1241,17 @@ sizx53=800 sizy53=600 maxfps53=0 initts53=0 -title54=Rayman 2 Demo -path54=D:\Games\Rayman2Demo\Rayman2Demo.exe +title54=Magic & Mayhem +path54=D:\Games\Magic_&_Mayhem\Chaos.exe module54= opengllib54= -ver54=7 +ver54=0 coord54=0 -flag54=402653217 -flagg54=1208025088 -flagh54=2097172 -flagi54=0 -tflag54=6419 +flag54=134217762 +flagg54=1207959552 +flagh54=20 +flagi54=4 +tflag54=0 initx54=0 inity54=0 minx54=0 @@ -1263,18 +1263,18 @@ posy54=50 sizx54=800 sizy54=600 maxfps54=0 -initts54=4 -title55=Shadows of the Empire (DEMO) -path55=D:\Games\Shadows of the Empire\shadows.exe +initts54=0 +title55=Motocross Madness (DEMO) +path55=D:\Games\Motocross Madness Trial\mcm.exe module55= opengllib55= ver55=0 -coord55=2 -flag55=134479906 -flagg55=1207959568 -flagh55=33554452 +coord55=0 +flag55=134217760 +flagg55=1207959552 +flagh55=20 flagi55=0 -tflag55=274 +tflag55=0 initx55=0 inity55=0 minx55=0 @@ -1287,17 +1287,17 @@ sizx55=800 sizy55=600 maxfps55=0 initts55=0 -title56=Star Wars Episode I Racer -path56=D:\Games\Star Wars Episode 1 racer\SWEP1RCR.EXE +title56=Need for Speed 2SE +path56=D:\Games\Need for Speed 2SE\NFS2SEN.EXE module56= opengllib56= ver56=0 coord56=0 -flag56=679493669 -flagg56=1210056720 -flagh56=8212 -flagi56=20 -tflag56=65 +flag56=134217826 +flagg56=1480589312 +flagh56=20 +flagi56=4 +tflag56=6163 initx56=0 inity56=0 minx56=0 @@ -1310,17 +1310,17 @@ sizx56=800 sizy56=600 maxfps56=0 initts56=0 -title57=StarCraft -path57=D:\Games\Starcraft\StarCraft.exe +title57=Need for Speed 2SE (3dfx) +path57=D:\Games\Need for Speed 2SE\nfs2sea.exe module57= opengllib57= ver57=0 coord57=0 -flag57=134217762 -flagg57=134283264 +flag57=134217760 +flagg57=1207959552 flagh57=20 -flagi57=8 -tflag57=64 +flagi57=4 +tflag57=6147 initx57=0 inity57=0 minx57=0 @@ -1333,17 +1333,17 @@ sizx57=800 sizy57=600 maxfps57=0 initts57=0 -title58=State of Emergency -path58=D:\Games\State of Emergency\KaosPC.exe +title58=Need for Speed 3 +path58=D:\Games\Need for Speed 3\nfs3.exe module58= opengllib58= -ver58=8 +ver58=1 coord58=0 -flag58=671088676 -flagg58=1208025088 +flag58=134217762 +flagg58=1207959552 flagh58=20 -flagi58=12 -tflag58=7315 +flagi58=4 +tflag58=0 initx58=0 inity58=0 minx58=0 @@ -1354,19 +1354,19 @@ posx58=50 posy58=50 sizx58=800 sizy58=600 -maxfps58=50 -initts58=4 -title59=Take no Prisoners -path59=D:\Games\Take no Prisoners\TNP.EXE +maxfps58=0 +initts58=0 +title59=Need For Speed Underground +path59=D:\Games\Need For Speed Underground\speed.exe module59= opengllib59= -ver59=0 +ver59=9 coord59=0 flag59=134217762 -flagg59=134217860 +flagg59=1207959552 flagh59=20 -flagi59=512 -tflag59=259 +flagi59=1028 +tflag59=0 initx59=0 inity59=0 minx59=0 @@ -1379,17 +1379,17 @@ sizx59=800 sizy59=600 maxfps59=0 initts59=0 -title60=Tomb Raider 4 (DEMO) -path60=D:\Games\Tomb Raider - The Last Revelation (Demo)\tomb4.exe +title60=Need for Speed Underground 2 +path60=D:\Games\Need for Speed Underground 2\SPEED2.EXE module60= opengllib60= -ver60=7 +ver60=9 coord60=0 -flag60=134217760 +flag60=134217762 flagg60=1207959552 flagh60=20 -flagi60=0 -tflag60=258 +flagi60=4 +tflag60=0 initx60=0 inity60=0 minx60=0 @@ -1402,16 +1402,16 @@ sizx60=800 sizy60=600 maxfps60=0 initts60=0 -title61=Tomb Raider II -path61=D:\Games\Tomb Raider II\Tomb2.exe +title61=Pandemonium 2 (GLIDE) +path61=D:\Games\Pandemonium 2\pandy.exe module61= opengllib61= ver61=0 coord61=0 -flag61=671088674 +flag61=134217762 flagg61=1207959552 flagh61=20 -flagi61=0 +flagi61=4 tflag61=0 initx61=0 inity61=0 @@ -1425,17 +1425,17 @@ sizx61=800 sizy61=600 maxfps61=0 initts61=0 -title62=Tomb Raider II Gold (DEMO) -path62=D:\Games\Tomb Raider II Gold (Demo)\Tomb2.exe +title62=Panzer Dragoon +path62=D:\Games\Panzer Dragoon\game\PANZERDG.EXE module62= opengllib62= ver62=0 -coord62=2 -flag62=671088674 -flagg62=1224736784 +coord62=0 +flag62=134217762 +flagg62=1207959552 flagh62=20 -flagi62=0 -tflag62=258 +flagi62=4 +tflag62=67 initx62=0 inity62=0 minx62=0 @@ -1448,17 +1448,17 @@ sizx62=800 sizy62=600 maxfps62=0 initts62=0 -title63=Tomb Raider III -path63=D:\Games\Tomb Raider III\tomb3.exe +title63=Praetorians +path63=D:\games\Praetorians\Praetorians.exe module63= opengllib63= ver63=0 coord63=2 flag63=134217760 -flagg63=1241514000 -flagh63=20 -flagi63=0 -tflag63=322 +flagg63=1209008144 +flagh63=22 +flagi63=4 +tflag63=2 initx63=0 inity63=0 minx63=0 @@ -1471,17 +1471,17 @@ sizx63=800 sizy63=600 maxfps63=0 initts63=0 -title64=Total Annihilation Kingdoms -path64=D:\Games\Total Annihilation Kingdoms\Kingdoms.exe +title64=Praetorians (DEMO) +path64=D:\Games\Praetorians Demo\Praetorians.exe module64= opengllib64= -ver64=7 +ver64=0 coord64=0 -flag64=134234146 -flagg64=1207959552 -flagh64=20 +flag64=150994976 +flagg64=1209008128 +flagh64=65556 flagi64=4 -tflag64=0 +tflag64=6419 initx64=0 inity64=0 minx64=0 @@ -1494,15 +1494,15 @@ sizx64=800 sizy64=600 maxfps64=0 initts64=0 -title65=Virtua Fighter 2 (DEMO) -path65=D:\Games\vf2_demo\VF2DEMO.EXE +title65=Premier Manager 98 +path65=D:\Games\Premier Manager 98\MANAGER.EXE module65= opengllib65= ver65=0 coord65=0 -flag65=939524131 -flagg65=1207959664 -flagh65=20 +flag65=671092770 +flagg65=1207959552 +flagh65=16 flagi65=0 tflag65=0 initx65=0 @@ -1517,17 +1517,17 @@ sizx65=800 sizy65=600 maxfps65=0 initts65=0 -title66=Virtua Fighter PC -path66=D:\Games\Virtua Fighter\VFPC.EXE +title66=Primitive Wars +path66=D:\Games\Primitive Wars\Pw.exe module66= opengllib66= ver66=0 coord66=0 -flag66=402653218 -flagg66=1224736784 -flagh66=33562644 +flag66=671088674 +flagg66=134217728 +flagh66=20 flagi66=0 -tflag66=291 +tflag66=0 initx66=0 inity66=0 minx66=0 @@ -1540,17 +1540,17 @@ sizx66=800 sizy66=600 maxfps66=0 initts66=0 -title67=Warcraft 2 Battlenet Ed -path67=D:\Games\Warcraft 2 Battlenet Ed\Warcraft II BNE.exe +title67=Project IGI +path67=D:\Games\Project IGI\pc\IGI.exe module67= opengllib67= ver67=0 coord67=0 -flag67=134217762 -flagg67=1210122240 -flagh67=148 -flagi67=12 -tflag67=0 +flag67=671105060 +flagg67=-939524096 +flagh67=20 +flagi67=4 +tflag67=67 initx67=0 inity67=0 minx67=0 @@ -1563,17 +1563,17 @@ sizx67=800 sizy67=600 maxfps67=0 initts67=0 -title68=Wargasm -path68=D:\Games\Wargasm\tank.exe +title68=Project Nomads (DEMO) +path68=D:\Games\Project Nomads Demo\bin\win32\nomads.exe module68= opengllib68= -ver68=0 -coord68=2 -flag68=671088672 -flagg68=1207959696 -flagh68=65556 +ver68=8 +coord68=0 +flag68=-1476394974 +flagg68=1207959808 +flagh68=4 flagi68=0 -tflag68=6163 +tflag68=274 initx68=0 inity68=0 minx68=0 @@ -1586,17 +1586,17 @@ sizx68=800 sizy68=600 maxfps68=0 initts68=0 -title69=Warlords Battlecry II (DEMO) -path69=D:\Games\Warlords Battlecry II Demo\Battlecry II Demo.exe +title69=Quake 2 +path69=D:\Games\QUAKE2\quake2.exe module69= opengllib69= ver69=0 -coord69=2 -flag69=134217762 -flagg69=1207959568 -flagh69=22 -flagi69=0 -tflag69=258 +coord69=0 +flag69=134234114 +flagg69=1208090624 +flagh69=20 +flagi69=4 +tflag69=0 initx69=0 inity69=0 minx69=0 @@ -1609,17 +1609,17 @@ sizx69=800 sizy69=600 maxfps69=0 initts69=0 -title70=Whiteout -path70=D:\Games\Whiteout\Whiteout.exe +title70=Railroad Tycoon II +path70=D:\Games\Railroad.Tycoon.II\RT2.EXE module70= opengllib70= ver70=0 coord70=0 -flag70=402653217 +flag70=134217762 flagg70=1207959552 flagh70=20 -flagi70=0 -tflag70=66 +flagi70=4 +tflag70=0 initx70=0 inity70=0 minx70=0 @@ -1628,21 +1628,21 @@ maxx70=0 maxy70=0 posx70=50 posy70=50 -sizx70=640 -sizy70=480 +sizx70=800 +sizy70=600 maxfps70=0 initts70=0 -title71=Wildfire -path71=D:\Games\Wildfire\Wildfire.exe +title71=Rayman 2 Demo +path71=D:\Games\Rayman2Demo\Rayman2Demo.exe module71= opengllib71= -ver71=0 +ver71=7 coord71=0 -flag71=-1476392958 -flagg71=1210122240 -flagh71=20 -flagi71=12 -tflag71=0 +flag71=402653217 +flagg71=1208025088 +flagh71=2097172 +flagi71=0 +tflag71=6419 initx71=0 inity71=0 minx71=0 @@ -1654,18 +1654,18 @@ posy71=50 sizx71=800 sizy71=600 maxfps71=0 -initts71=0 -title72=Worms Pinball -path72=D:\Games\Worms Pinball\WPIB.exe +initts71=4 +title72=Shadows of the Empire (DEMO) +path72=D:\Games\Shadows of the Empire\shadows.exe module72= opengllib72= -ver72=1 -coord72=0 -flag72=134217762 +ver72=0 +coord72=2 +flag72=134479906 flagg72=1207959568 -flagh72=20 -flagi72=4 -tflag72=0 +flagh72=33554452 +flagi72=0 +tflag72=274 initx72=0 inity72=0 minx72=0 @@ -1678,17 +1678,17 @@ sizx72=800 sizy72=600 maxfps72=0 initts72=0 -title73=Zanzarah -path73=D:\Games\Zanzarah\System\zanthp.exe +title73=Star Wars Episode I Racer +path73=D:\Games\Star Wars Episode 1 racer\SWEP1RCR.EXE module73= opengllib73= ver73=0 coord73=0 -flag73=679477280 -flagg73=1207959552 -flagh73=20 -flagi73=0 -tflag73=0 +flag73=679493669 +flagg73=1210056720 +flagh73=8212 +flagi73=20 +tflag73=65 initx73=0 inity73=0 minx73=0 @@ -1701,17 +1701,17 @@ sizx73=800 sizy73=600 maxfps73=0 initts73=0 -title74=Zax the Alien Hunter (DEMO) -path74=D:\Games\ZaxDemo\Zax.exe +title74=StarCraft +path74=D:\Games\Starcraft\StarCraft.exe module74= opengllib74= ver74=0 -coord74=2 -flag74=-2011168734 -flagg74=1209008144 +coord74=0 +flag74=134217762 +flagg74=134283264 flagh74=20 -flagi74=0 -tflag74=258 +flagi74=8 +tflag74=64 initx74=0 inity74=0 minx74=0 @@ -1724,17 +1724,17 @@ sizx74=800 sizy74=600 maxfps74=0 initts74=0 -title75=ZPC Zero Population Count -path75=D:\Games\ZPC\ZPC.EXE +title75=State of Emergency +path75=D:\Games\State of Emergency\KaosPC.cracked.exe module75= opengllib75= -ver75=0 +ver75=8 coord75=0 -flag75=134217762 -flagg75=1207959552 +flag75=671088676 +flagg75=1208025088 flagh75=20 -flagi75=4 -tflag75=0 +flagi75=2052 +tflag75=6163 initx75=0 inity75=0 minx75=0 @@ -1745,19 +1745,19 @@ posx75=50 posy75=50 sizx75=800 sizy75=600 -maxfps75=0 -initts75=0 -title76=Lost Valley +maxfps75=50 +initts75=2 +title76=Take no Prisoners module76= opengllib76= -path76=D:\Games\Lost Valley\lost valley\lost valley data.exe +path76=D:\Games\Take no Prisoners\TNP.EXE ver76=0 coord76=0 -flag76=142614562 -flagg76=1207959552 -flagh76=-2080374764 -flagi76=0 -tflag76=0 +flag76=134217762 +flagg76=134217860 +flagh76=20 +flagi76=512 +tflag76=259 initx76=0 inity76=0 minx76=0 @@ -1770,17 +1770,17 @@ sizx76=800 sizy76=600 maxfps76=0 initts76=0 -title77=Grand Prix World -path77=D:\Games\Grand Prix World\gpwxp2.exe +title77=The Bard's Tale +path77=D:\Games\The Bard's Tale\The Bard's Tale.exe module77= opengllib77= -ver77=0 +ver77=9 coord77=0 -flag77=134217762 -flagg77=135266432 +flag77=1753227296 +flagg77=139460608 flagh77=20 -flagi77=0 -tflag77=0 +flagi77=1024 +tflag77=6163 initx77=0 inity77=0 minx77=0 @@ -1793,17 +1793,17 @@ sizx77=800 sizy77=600 maxfps77=0 initts77=0 -title78=Premier Manager 98 -path78=D:\Games\Premier Manager 98\MANAGER.EXE +title78=Tomb Raider 4 (DEMO) +path78=D:\Games\Tomb Raider - The Last Revelation (Demo)\tomb4.exe module78= opengllib78= -ver78=0 +ver78=7 coord78=0 -flag78=671092770 +flag78=134217760 flagg78=1207959552 -flagh78=16 +flagh78=20 flagi78=0 -tflag78=0 +tflag78=258 initx78=0 inity78=0 minx78=0 @@ -1816,17 +1816,17 @@ sizx78=800 sizy78=600 maxfps78=0 initts78=0 -title79=Fighting Force -path79=D:\Games\Fighting Force\game\fforce.exe +title79=Tomb Raider II +path79=D:\Games\Tomb Raider II\Tomb2.exe module79= opengllib79= ver79=0 coord79=0 -flag79=134217824 +flag79=671088674 flagg79=1207959552 flagh79=20 -flagi79=4 -tflag79=6163 +flagi79=0 +tflag79=0 initx79=0 inity79=0 minx79=0 @@ -1839,17 +1839,17 @@ sizx79=800 sizy79=600 maxfps79=0 initts79=0 -title80=The Bard's Tale (GOG) -path80=D:\Games\The Bard's Tale\The Bard's Tale - Copia.exe +title80=Tomb Raider II Gold (DEMO) +path80=D:\Games\Tomb Raider II Gold (Demo)\Tomb2.exe module80= opengllib80= -ver80=9 -coord80=0 -flag80=679485472 -flagg80=138412032 +ver80=0 +coord80=2 +flag80=671088674 +flagg80=1224736784 flagh80=20 -flagi80=1024 -tflag80=6163 +flagi80=0 +tflag80=258 initx80=0 inity80=0 minx80=0 @@ -1862,17 +1862,17 @@ sizx80=800 sizy80=600 maxfps80=0 initts80=0 -title81=Need for Speed Underground 2 -path81=D:\Games\Need for Speed Underground 2\SPEED2.EXE +title81=Tomb Raider III +path81=D:\Games\Tomb Raider III\tomb3.exe module81= opengllib81= -ver81=9 -coord81=0 -flag81=134217762 -flagg81=1207959552 +ver81=0 +coord81=2 +flag81=134217760 +flagg81=1241514000 flagh81=20 -flagi81=4 -tflag81=0 +flagi81=0 +tflag81=322 initx81=0 inity81=0 minx81=0 @@ -1885,17 +1885,17 @@ sizx81=800 sizy81=600 maxfps81=0 initts81=0 -title82=Need For Speed Underground -path82=D:\Games\Need For Speed Underground\speed.exe +title82=Total Annihilation Kingdoms +path82=D:\Games\Total Annihilation Kingdoms\Kingdoms.exe module82= opengllib82= -ver82=9 +ver82=7 coord82=0 -flag82=134217762 +flag82=671105058 flagg82=1207959552 flagh82=20 -flagi82=1028 -tflag82=0 +flagi82=4 +tflag82=6163 initx82=0 inity82=0 minx82=0 @@ -1908,17 +1908,17 @@ sizx82=800 sizy82=600 maxfps82=0 initts82=0 -title83=Need for Speed 2SE (3dfx) -path83=D:\Games\Need for Speed 2SE\nfs2sea.exe +title83=Virtua Fighter 2 (DEMO) +path83=D:\Games\vf2_demo\VF2DEMO.EXE module83= opengllib83= ver83=0 coord83=0 -flag83=134217760 -flagg83=1207959552 +flag83=939524131 +flagg83=1207959664 flagh83=20 -flagi83=4 -tflag83=6147 +flagi83=0 +tflag83=0 initx83=0 inity83=0 minx83=0 @@ -1931,17 +1931,17 @@ sizx83=800 sizy83=600 maxfps83=0 initts83=0 -title84=Need for Speed 2SE -path84=D:\Games\Need for Speed 2SE\NFS2SEN.EXE +title84=Virtua Fighter PC +path84=D:\Games\Virtua Fighter\VFPC.EXE module84= opengllib84= ver84=0 coord84=0 -flag84=134217826 -flagg84=1480589312 -flagh84=20 -flagi84=4 -tflag84=6163 +flag84=402653218 +flagg84=1224736784 +flagh84=33562644 +flagi84=0 +tflag84=291 initx84=0 inity84=0 minx84=0 @@ -1954,16 +1954,16 @@ sizx84=800 sizy84=600 maxfps84=0 initts84=0 -title85=Need for Speed 3 -path85=D:\Games\Need for Speed 3\nfs3.exe +title85=Warcraft 2 Battlenet Ed +path85=D:\Games\Warcraft 2 Battlenet Ed\Warcraft II BNE.exe module85= opengllib85= -ver85=1 +ver85=0 coord85=0 flag85=134217762 -flagg85=1207959552 -flagh85=20 -flagi85=4 +flagg85=1210122240 +flagh85=148 +flagi85=12 tflag85=0 initx85=0 inity85=0 @@ -1977,8 +1977,422 @@ sizx85=800 sizy85=600 maxfps85=0 initts85=0 +title86=Wargasm +path86=D:\Games\Wargasm\tank.exe +module86= +opengllib86= +ver86=0 +coord86=2 +flag86=671088672 +flagg86=1207959696 +flagh86=65556 +flagi86=0 +tflag86=6163 +initx86=0 +inity86=0 +minx86=0 +miny86=0 +maxx86=0 +maxy86=0 +posx86=50 +posy86=50 +sizx86=800 +sizy86=600 +maxfps86=0 +initts86=0 +title87=Warlords Battlecry II (DEMO) +path87=D:\Games\Warlords Battlecry II Demo\Battlecry II Demo.exe +module87= +opengllib87= +ver87=0 +coord87=2 +flag87=134217762 +flagg87=1207959568 +flagh87=22 +flagi87=0 +tflag87=258 +initx87=0 +inity87=0 +minx87=0 +miny87=0 +maxx87=0 +maxy87=0 +posx87=50 +posy87=50 +sizx87=800 +sizy87=600 +maxfps87=0 +initts87=0 +title88=Whiteout +path88=D:\Games\Whiteout\Whiteout.exe +module88= +opengllib88= +ver88=0 +coord88=0 +flag88=402653217 +flagg88=1207959552 +flagh88=20 +flagi88=0 +tflag88=66 +initx88=0 +inity88=0 +minx88=0 +miny88=0 +maxx88=0 +maxy88=0 +posx88=50 +posy88=50 +sizx88=640 +sizy88=480 +maxfps88=0 +initts88=0 +title89=Wildfire +path89=D:\Games\Wildfire\Wildfire.exe +module89= +opengllib89= +ver89=0 +coord89=0 +flag89=-1476392958 +flagg89=1210122240 +flagh89=20 +flagi89=12 +tflag89=0 +initx89=0 +inity89=0 +minx89=0 +miny89=0 +maxx89=0 +maxy89=0 +posx89=50 +posy89=50 +sizx89=800 +sizy89=600 +maxfps89=0 +initts89=0 +title90=Worms Pinball +path90=D:\Games\Worms Pinball\WPIB.exe +module90= +opengllib90= +ver90=1 +coord90=0 +flag90=134217762 +flagg90=1207959568 +flagh90=20 +flagi90=4 +tflag90=0 +initx90=0 +inity90=0 +minx90=0 +miny90=0 +maxx90=0 +maxy90=0 +posx90=50 +posy90=50 +sizx90=800 +sizy90=600 +maxfps90=0 +initts90=0 +title91=Zanzarah +path91=D:\Games\Zanzarah\System\zanthp.exe +module91= +opengllib91= +ver91=0 +coord91=0 +flag91=679477280 +flagg91=1207959552 +flagh91=20 +flagi91=0 +tflag91=0 +initx91=0 +inity91=0 +minx91=0 +miny91=0 +maxx91=0 +maxy91=0 +posx91=50 +posy91=50 +sizx91=800 +sizy91=600 +maxfps91=0 +initts91=0 +title92=Zax the Alien Hunter (DEMO) +path92=D:\Games\ZaxDemo\Zax.exe +module92= +opengllib92= +ver92=0 +coord92=2 +flag92=-2011168734 +flagg92=1209008144 +flagh92=20 +flagi92=0 +tflag92=258 +initx92=0 +inity92=0 +minx92=0 +miny92=0 +maxx92=0 +maxy92=0 +posx92=50 +posy92=50 +sizx92=800 +sizy92=600 +maxfps92=0 +initts92=0 +title93=ZPC Zero Population Count +path93=D:\Games\ZPC\ZPC.EXE +module93= +opengllib93= +ver93=0 +coord93=0 +flag93=134217762 +flagg93=1207959552 +flagh93=20 +flagi93=4 +tflag93=0 +initx93=0 +inity93=0 +minx93=0 +miny93=0 +maxx93=0 +maxy93=0 +posx93=50 +posy93=50 +sizx93=800 +sizy93=600 +maxfps93=0 +initts93=0 +title94=Martian Gothic Unification +path94=D:\Games\Martian Gothic\martian gothic.exe +module94= +opengllib94= +ver94=0 +coord94=0 +flag94=203423776 +flagg94=1476395008 +flagh94=20 +flagi94=5 +tflag94=6163 +initx94=0 +inity94=0 +minx94=0 +miny94=0 +maxx94=0 +maxy94=0 +posx94=50 +posy94=50 +sizx94=800 +sizy94=600 +maxfps94=0 +initts94=0 +title95=Syberia +path95=D:\Games\Syberia\Syberia.exe +module95= +opengllib95= +ver95=0 +coord95=0 +flag95=822116385 +flagg95=1242562576 +flagh95=20 +flagi95=4 +tflag95=6171 +initx95=150 +inity95=150 +minx95=150 +miny95=150 +maxx95=800 +maxy95=600 +posx95=50 +posy95=50 +sizx95=800 +sizy95=600 +maxfps95=0 +initts95=0 +title96=Nascar Racing 3 +path96=D:\Games\Nascar Racing 3\NASCAR Racing 3.exe +module96= +opengllib96= +ver96=0 +coord96=0 +flag96=671105056 +flagg96=1207959552 +flagh96=20 +flagi96=4 +tflag96=6163 +initx96=0 +inity96=0 +minx96=0 +miny96=0 +maxx96=0 +maxy96=0 +posx96=50 +posy96=50 +sizx96=800 +sizy96=600 +maxfps96=0 +initts96=0 +title97=Neophyte Koplio's Story +path97=D:\Games\Neophyte Koplio's Story\KOPLIO.exe +module97= +opengllib97= +ver97=1 +coord97=0 +flag97=134234146 +flagg97=1207959552 +flagh97=20 +flagi97=4 +tflag97=0 +initx97=0 +inity97=0 +minx97=0 +miny97=0 +maxx97=0 +maxy97=0 +posx97=50 +posy97=50 +sizx97=800 +sizy97=600 +maxfps97=0 +initts97=0 +title98=NetStorm - Islands at War +path98=D:\Games\NetStorm - Islands at War\Netstorm.exe +module98= +opengllib98= +ver98=0 +coord98=0 +flag98=679608354 +flagg98=1209008384 +flagh98=20 +flagi98=4 +tflag98=0 +initx98=0 +inity98=0 +minx98=0 +miny98=0 +maxx98=0 +maxy98=0 +posx98=50 +posy98=50 +sizx98=800 +sizy98=600 +maxfps98=0 +initts98=0 +title99=Dracula Twins +path99=D:\Games\Dracula Twins\DraculaTwins.exe +module99= +opengllib99= +ver99=0 +coord99=0 +flag99=134217762 +flagg99=1207959552 +flagh99=20 +flagi99=4 +tflag99=0 +initx99=0 +inity99=0 +minx99=0 +miny99=0 +maxx99=0 +maxy99=0 +posx99=50 +posy99=50 +sizx99=800 +sizy99=600 +maxfps99=0 +initts99=0 +title100=Starsky & Hutch - GAME +path100=D:\Games\Starsky & Hutch\StarskyPC.exe +module100= +opengllib100= +ver100=0 +coord100=0 +flag100=947912739 +flagg100=1207959552 +flagh100=20 +flagi100=4 +tflag100=0 +initx100=0 +inity100=0 +minx100=0 +miny100=0 +maxx100=0 +maxy100=0 +posx100=50 +posy100=50 +sizx100=800 +sizy100=600 +maxfps100=0 +initts100=0 +title101=Starsky & Hutch - LAUNCHER +path101=D:\Games\Starsky & Hutch\Starsky.exe +module101= +opengllib101= +ver101=0 +coord101=0 +flag101=134217728 +flagg101=1207959552 +flagh101=20 +flagi101=4 +tflag101=0 +initx101=0 +inity101=0 +minx101=0 +miny101=0 +maxx101=0 +maxy101=0 +posx101=50 +posy101=50 +sizx101=800 +sizy101=600 +maxfps101=0 +initts101=0 +title102=Unreal Tournament +path102=D:\Games\Unreal Tournament\System\UnrealTournament.exe +module102= +opengllib102= +ver102=0 +coord102=0 +flag102=-2013265886 +flagg102=1209073680 +flagh102=20 +flagi102=2052 +tflag102=4097 +initx102=0 +inity102=0 +minx102=0 +miny102=0 +maxx102=0 +maxy102=0 +posx102=50 +posy102=50 +sizx102=1200 +sizy102=900 +maxfps102=0 +initts102=0 +title103=Half-Life +module103= +opengllib103= +path103=D:\Games\Half-Life\hl.exe +ver103=12 +coord103=0 +flag103=1207959584 +flagg103=1209139200 +flagh103=16 +flagi103=2060 +tflag103=4097 +initx103=0 +inity103=0 +minx103=0 +miny103=0 +maxx103=0 +maxy103=0 +posx103=50 +posy103=50 +sizx103=800 +sizy103=600 +maxfps103=0 +initts103=0 [window] -posx=1162 -posy=187 -sizx=638 -sizy=673 +posx=995 +posy=119 +sizx=868 +sizy=837 diff --git a/build/exports/Amerzone.dxw b/build/exports/Amerzone.dxw new file mode 100644 index 0000000..c9fc281 --- /dev/null +++ b/build/exports/Amerzone.dxw @@ -0,0 +1,24 @@ +[target] +title0=Amerzone +path0=D:\Games\Amerzone\amerzone.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=134234114 +flagg0=1207959568 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Bomberbabe.dxw b/build/exports/Bomberbabe.dxw new file mode 100644 index 0000000..a3f5a41 --- /dev/null +++ b/build/exports/Bomberbabe.dxw @@ -0,0 +1,24 @@ +[target] +title0=Bomberbabe +path0=D:\Games\Ludonic\Bomberbabe.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=671088674 +flagg0=1207959552 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Dracula Twins.dxw b/build/exports/Dracula Twins.dxw new file mode 100644 index 0000000..f3774e5 --- /dev/null +++ b/build/exports/Dracula Twins.dxw @@ -0,0 +1,24 @@ +[target] +title0=Dracula Twins +path0=D:\Games\Dracula Twins\DraculaTwins.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=134217762 +flagg0=1207959552 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Lords of Magic Special Edition.dxw b/build/exports/Lords of Magic Special Edition.dxw new file mode 100644 index 0000000..c5048f2 --- /dev/null +++ b/build/exports/Lords of Magic Special Edition.dxw @@ -0,0 +1,24 @@ +[target] +title0=Lords of Magic Special Edition +path0=D:\Games\LoM\SIERRA\LOMSE\lomse.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=404766753 +flagg0=1207959552 +flagh0=6291540 +flagi0=0 +tflag0=6419 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Martian Gothic Unification.dxw b/build/exports/Martian Gothic Unification.dxw new file mode 100644 index 0000000..f31d8d2 --- /dev/null +++ b/build/exports/Martian Gothic Unification.dxw @@ -0,0 +1,24 @@ +[target] +title0=Martian Gothic Unification +path0=D:\Games\Martian Gothic\martian gothic.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=134217760 +flagg0=1207959552 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Nascar Racing 3.dxw b/build/exports/Nascar Racing 3.dxw new file mode 100644 index 0000000..1c2409b --- /dev/null +++ b/build/exports/Nascar Racing 3.dxw @@ -0,0 +1,24 @@ +[target] +title0=Nascar Racing 3 +path0=D:\Games\Nascar Racing 3\NASCAR Racing 3.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=671105056 +flagg0=1207959552 +flagh0=20 +flagi0=4 +tflag0=6163 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Neophyte Koplio's Story.dxw b/build/exports/Neophyte Koplio's Story.dxw new file mode 100644 index 0000000..75e4c62 --- /dev/null +++ b/build/exports/Neophyte Koplio's Story.dxw @@ -0,0 +1,24 @@ +[target] +title0=Neophyte Koplio's Story +path0=D:\Games\Neophyte Koplio's Story\KOPLIO.exe +module0= +opengllib0= +ver0=1 +coord0=0 +flag0=134234146 +flagg0=1207959552 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/NetStorm - Islands at War.dxw b/build/exports/NetStorm - Islands at War.dxw new file mode 100644 index 0000000..45ea3f0 --- /dev/null +++ b/build/exports/NetStorm - Islands at War.dxw @@ -0,0 +1,24 @@ +[target] +title0=NetStorm - Islands at War +path0=D:\Games\NetStorm - Islands at War\Netstorm.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=679608354 +flagg0=1209008384 +flagh0=20 +flagi0=4 +tflag0=0 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=800 +sizy0=600 +maxfps0=0 +initts0=0 diff --git a/build/exports/Unreal Tournament.dxw b/build/exports/Unreal Tournament.dxw new file mode 100644 index 0000000..fe92270 --- /dev/null +++ b/build/exports/Unreal Tournament.dxw @@ -0,0 +1,24 @@ +[target] +title0=Unreal Tournament +path0=D:\Games\Unreal Tournament\System\UnrealTournament.exe +module0= +opengllib0= +ver0=0 +coord0=0 +flag0=-2013265886 +flagg0=1209073680 +flagh0=20 +flagi0=2052 +tflag0=4097 +initx0=0 +inity0=0 +minx0=0 +miny0=0 +maxx0=0 +maxy0=0 +posx0=50 +posy0=50 +sizx0=1200 +sizy0=900 +maxfps0=0 +initts0=0 diff --git a/build/readme-relnotes.txt b/build/readme-relnotes.txt index 32277b1..1987671 100644 --- a/build/readme-relnotes.txt +++ b/build/readme-relnotes.txt @@ -336,4 +336,8 @@ Hooked d3d8/9 AddRef / release methods (for logging) Fixed D3DDevice8/9 hooking Hooked QueryPerformanceFrequency Fixed a bug in d3d7 hooking -GUI: added desktop cplor setting +GUI: added desktop color setting + +v2.02.50 +Added "Intercept RDTSC" option: so far, tested on Unreal Tournament only. +To implement RDTSC detection, I owe a big thank you to Olly who shared the disasm lib used to browse the assembly code. diff --git a/d3d9proxy/Release/BuildLog.htm b/d3d9proxy/Release/BuildLog.htm new file mode 100644 index 0000000..a7bded1 Binary files /dev/null and b/d3d9proxy/Release/BuildLog.htm differ diff --git a/d3d9proxy/Release/d3d9.dll.intermediate.manifest b/d3d9proxy/Release/d3d9.dll.intermediate.manifest new file mode 100644 index 0000000..ecea6f7 --- /dev/null +++ b/d3d9proxy/Release/d3d9.dll.intermediate.manifest @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/d3d9proxy/Release/d3d9.pch b/d3d9proxy/Release/d3d9.pch new file mode 100644 index 0000000..03b39ea Binary files /dev/null and b/d3d9proxy/Release/d3d9.pch differ diff --git a/d3d9proxy/Release/mt.dep b/d3d9proxy/Release/mt.dep new file mode 100644 index 0000000..8db6ed8 --- /dev/null +++ b/d3d9proxy/Release/mt.dep @@ -0,0 +1 @@ +Manifest resource last updated at 22:26:06.50 on 27/12/2013 diff --git a/d3d9proxy/Release/myIDirect3D9.obj b/d3d9proxy/Release/myIDirect3D9.obj new file mode 100644 index 0000000..02ed6f6 Binary files /dev/null and b/d3d9proxy/Release/myIDirect3D9.obj differ diff --git a/d3d9proxy/Release/myIDirect3DDevice9.obj b/d3d9proxy/Release/myIDirect3DDevice9.obj new file mode 100644 index 0000000..a1b9525 Binary files /dev/null and b/d3d9proxy/Release/myIDirect3DDevice9.obj differ diff --git a/d3d9proxy/Release/proxydll.exp b/d3d9proxy/Release/proxydll.exp new file mode 100644 index 0000000..e7a865f Binary files /dev/null and b/d3d9proxy/Release/proxydll.exp differ diff --git a/d3d9proxy/Release/proxydll.lib b/d3d9proxy/Release/proxydll.lib new file mode 100644 index 0000000..d3b94f7 Binary files /dev/null and b/d3d9proxy/Release/proxydll.lib differ diff --git a/d3d9proxy/Release/proxydll.obj b/d3d9proxy/Release/proxydll.obj new file mode 100644 index 0000000..4857036 Binary files /dev/null and b/d3d9proxy/Release/proxydll.obj differ diff --git a/d3d9proxy/Release/stdafx.obj b/d3d9proxy/Release/stdafx.obj new file mode 100644 index 0000000..add114b Binary files /dev/null and b/d3d9proxy/Release/stdafx.obj differ diff --git a/d3d9proxy/Release/vc90.idb b/d3d9proxy/Release/vc90.idb new file mode 100644 index 0000000..3da92cd Binary files /dev/null and b/d3d9proxy/Release/vc90.idb differ diff --git a/d3d9proxy/Release/vc90.pdb b/d3d9proxy/Release/vc90.pdb new file mode 100644 index 0000000..e9b6438 Binary files /dev/null and b/d3d9proxy/Release/vc90.pdb differ diff --git a/d3d9proxy/proxydll.suo b/d3d9proxy/proxydll.suo index 9d4a040..9cd9b24 100644 Binary files a/d3d9proxy/proxydll.suo and b/d3d9proxy/proxydll.suo differ diff --git a/dll/ddraw.cpp b/dll/ddraw.cpp index 3cc7c50..0e6efb7 100644 --- a/dll/ddraw.cpp +++ b/dll/ddraw.cpp @@ -2161,9 +2161,10 @@ static void FixSurfaceCaps(LPDDSURFACEDESC2 lpddsd, int dxversion) // 4) if DDSD_CAPS is not set, ignore caps // 5) ignore DDSD_CKSRCBLT, .... // 6) setting a different pixel format in memory requires DDSCAPS_OFFSCREENPLAIN capability - // 7) DDSD_TEXTURESTAGE surfaces may need to adjust fixel format (....???) + // 7) DDSD_TEXTURESTAGE surfaces may need to adjust pixel format (....???) // 8) Generic surfaces are mapped to SYSTEMMEMORY and set to primary surface PixelFormat // 9) When pixelformat is unspecified, be sure to pick the right one (with or without alphapixels?) + // 10) Don't alter surfaces with a color depth different from primary surface (Lords of Magic Special Edition) if(!(lpddsd->dwFlags & DDSD_CAPS)) lpddsd->ddsCaps.dwCaps = 0; @@ -2214,6 +2215,9 @@ static void FixSurfaceCaps(LPDDSURFACEDESC2 lpddsd, int dxversion) // v2.02.41: don't alter FOURCC pixel formats if((lpddsd->dwFlags & DDSD_PIXELFORMAT) && (lpddsd->ddpfPixelFormat.dwFlags & DDPF_FOURCC)) return; + // v2.02.50: don't alter surfaces with different color depth + if((lpddsd->dwFlags & DDSD_PIXELFORMAT) && (lpddsd->ddpfPixelFormat.dwRGBBitCount != dxw.VirtualPixelFormat.dwRGBBitCount)) return; + #if 0 // v2.02.43: don't alter MIPMAP surfaces if((lpddsd->dwFlags & DDSD_MIPMAPCOUNT) && (lpddsd->ddsCaps.dwCaps & DDSCAPS_MIPMAP)) { @@ -2497,6 +2501,12 @@ static HRESULT BuildGenericEmu(LPDIRECTDRAW lpdd, CreateSurface_Type pCreateSurf DumpSurfaceAttributes((LPDDSURFACEDESC)&ddsd, "[Emu Generic]" , __LINE__); res=(*pCreateSurface)(lpdd, &ddsd, lplpdds, pu); + if ((dxw.dwFlags1 & SWITCHVIDEOMEMORY) && (res==DDERR_OUTOFVIDEOMEMORY)){ + OutTraceDW("CreateSurface ERROR: res=%x(%s) at %d, retry\n", res, ExplainDDError(res), __LINE__); + ddsd.ddsCaps.dwCaps &= ~DDSCAPS_VIDEOMEMORY; + ddsd.ddsCaps.dwCaps |= DDSCAPS_SYSTEMMEMORY; + res=(*pCreateSurface)(lpdd, &ddsd, lplpdds, pu); + } if (res) { OutTraceE("CreateSurface: ERROR on Emu_Generic res=%x(%s) at %d\n", res, ExplainDDError(res), __LINE__); return res; diff --git a/dll/dxhook.cpp b/dll/dxhook.cpp index d867ea2..1556ca0 100644 --- a/dll/dxhook.cpp +++ b/dll/dxhook.cpp @@ -5,6 +5,7 @@ #include #include #include +#include #include "dxwnd.h" #include "dxwcore.hpp" #include "dxhook.h" @@ -17,6 +18,7 @@ #include "Ime.h" #include "Winnls32.h" #include "Mmsystem.h" +#include "disasm.h" dxwCore dxw; @@ -67,7 +69,7 @@ static char *Flag3Names[32]={ static char *Flag4Names[32]={ "NOALPHACHANNEL", "SUPPRESSCHILD", "FIXREFCOUNTER", "SHOWTIMESTRETCH", "ZBUFFERCLEAN", "ZBUFFER0CLEAN", "ZBUFFERALWAYS", "DISABLEFOGGING", - "NOPOWER2FIX", "NOPERFCOUNTER", "ADDPROXYLIBS", "", + "NOPOWER2FIX", "NOPERFCOUNTER", "ADDPROXYLIBS", "INTERCEPTRDTSC", "", "", "", "", "", "", "", "", "", "", "", "", @@ -576,7 +578,7 @@ void *HookAPI(HMODULE module, char *dll, void *apiproc, const char *apiname, voi void CalculateWindowPos(HWND hwnd, DWORD width, DWORD height, LPWINDOWPOS wp) { RECT rect, desktop, workarea; - DWORD dwStyle; + DWORD dwStyle, dwExStyle; int MaxX, MaxY; HMENU hMenu; @@ -617,8 +619,9 @@ void CalculateWindowPos(HWND hwnd, DWORD width, DWORD height, LPWINDOWPOS wp) RECT UnmappedRect; UnmappedRect=rect; dwStyle=(*pGetWindowLong)(hwnd, GWL_STYLE); + dwExStyle=(*pGetWindowLong)(hwnd, GWL_EXSTYLE); hMenu = GetMenu(hwnd); - AdjustWindowRect(&rect, dwStyle, (hMenu!=NULL)); + AdjustWindowRectEx(&rect, dwStyle, (hMenu!=NULL), dwExStyle); if (hMenu) CloseHandle(hMenu); switch(dxw.Coordinates){ case DXW_DESKTOP_WORKAREA: @@ -1318,6 +1321,51 @@ LPTOP_LEVEL_EXCEPTION_FILTER WINAPI extSetUnhandledExceptionFilter(LPTOP_LEVEL_E return (*pSetUnhandledExceptionFilter)(myUnhandledExceptionFilter); } +//#define USEPERFCOUNTERS + +unsigned __int64 inline GetRDTSC() { + __asm { + ; Flush the pipeline + XOR eax, eax + CPUID + ; Get RDTSC counter in edx:eax + RDTSC + } +} + +LONG CALLBACK Int3Handler(PEXCEPTION_POINTERS ExceptionInfo) +{ + // Vectored Handler routine to intercept INT3 opcodes replacing RDTSC + if (ExceptionInfo->ExceptionRecord->ExceptionCode == 0x80000003){ + LARGE_INTEGER myPerfCount; +#ifdef USEPERFCOUNTERS + if(!pQueryPerformanceCounter) pQueryPerformanceCounter=QueryPerformanceCounter; + (*pQueryPerformanceCounter)(&myPerfCount); +#else + __asm { + ; Flush the pipeline + XOR eax, eax + CPUID + ; Get RDTSC counter in edx:eax + RDTSC + mov myPerfCount.LowPart, eax + mov myPerfCount.HighPart, edx + } +#endif + myPerfCount.HighPart = dxw.StretchCounter(myPerfCount.HighPart); + myPerfCount.LowPart = dxw.StretchCounter(myPerfCount.LowPart); + OutTraceDW("Int3Handler: INT3 at=%x tick=%x RDTSC=%x:%x\n", + ExceptionInfo->ExceptionRecord->ExceptionAddress, (*pGetTickCount)(), myPerfCount.HighPart, myPerfCount.LowPart); + + ExceptionInfo->ContextRecord->Edx = myPerfCount.HighPart; + ExceptionInfo->ContextRecord->Eax = myPerfCount.LowPart; + ExceptionInfo->ContextRecord->Eip++; // skip ahead one-byte ( jump over 0xCC op-code ) + ExceptionInfo->ContextRecord->Eip++; // skip ahead one-byte ( jump over 0x90 op-code ) + return EXCEPTION_CONTINUE_EXECUTION; + } + return EXCEPTION_CONTINUE_SEARCH; +} + void HookExceptionHandler(void) { void *tmp; @@ -1329,15 +1377,12 @@ void HookExceptionHandler(void) //v2.1.75 override default exception handler, if any.... LONG WINAPI myUnhandledExceptionFilter(LPEXCEPTION_POINTERS); tmp = HookAPI(base, "KERNEL32.dll", UnhandledExceptionFilter, "UnhandledExceptionFilter", myUnhandledExceptionFilter); - // so far, no need to save the previous handler. - //if(tmp) pUnhandledExceptionFilter = (UnhandledExceptionFilter_Type)tmp; + // so far, no need to save the previous handler, but anyway... tmp = HookAPI(base, "KERNEL32.dll", SetUnhandledExceptionFilter, "SetUnhandledExceptionFilter", extSetUnhandledExceptionFilter); - //tmp = HookAPI("KERNEL32.dll", SetUnhandledExceptionFilter, "SetUnhandledExceptionFilter", myUnhandledExceptionFilter); if(tmp) pSetUnhandledExceptionFilter = (SetUnhandledExceptionFilter_Type)tmp; SetErrorMode(SEM_NOGPFAULTERRORBOX|SEM_NOOPENFILEERRORBOX|SEM_FAILCRITICALERRORS); (*pSetUnhandledExceptionFilter)((LPTOP_LEVEL_EXCEPTION_FILTER)myUnhandledExceptionFilter); - //(*pSetUnhandledExceptionFilter)(NULL); } void HookModule(HMODULE base, int dxversion) @@ -1432,6 +1477,97 @@ LRESULT CALLBACK MessageHook(int code, WPARAM wParam, LPARAM lParam) return CallNextHookEx(hMouseHook, code, wParam, lParam); } +static void ReplaceRDTSC() +{ + typedef char *(*Geterrwarnmessage_Type)(unsigned long, unsigned long); + typedef int (*Preparedisasm_Type)(void); + typedef void (*Finishdisasm_Type)(void); + typedef unsigned long (*Disasm_Type)(const unsigned char *, unsigned long, unsigned long, t_disasm *, int, t_config *, int (*)(tchar *, unsigned long)); + typedef BOOL (WINAPI *GetModuleInformation_Type)(HANDLE, HMODULE, LPMODULEINFO, DWORD); + + HMODULE disasmlib; + #define MAX_FILE_PATH 512 + char sSourcePath[MAX_FILE_PATH+1]; + char *p; + Geterrwarnmessage_Type pGeterrwarnmessage; + Preparedisasm_Type pPreparedisasm; + Finishdisasm_Type pFinishdisasm; + Disasm_Type pDisasm; + DWORD dwAttrib; + unsigned char *opcodes; + t_disasm da; + MODULEINFO mi; + HMODULE psapilib; + GetModuleInformation_Type pGetModuleInformation; + DWORD dwSegSize; + + dwAttrib = GetFileAttributes("dxwnd.dll"); + if (dwAttrib != INVALID_FILE_ATTRIBUTES && !(dwAttrib & FILE_ATTRIBUTE_DIRECTORY)) return; + GetModuleFileName(GetModuleHandle("dxwnd"), sSourcePath, MAX_FILE_PATH); + p=&sSourcePath[strlen(sSourcePath)-strlen("dxwnd.dll")]; + strcpy(p, "disasm.dll"); + disasmlib=(*pLoadLibraryA)(sSourcePath); + if(!disasmlib) { + OutTraceDW("DXWND: Load lib=\"%s\" failed err=%d\n", sSourcePath, GetLastError()); + return; + } + pGeterrwarnmessage=(Geterrwarnmessage_Type)(*pGetProcAddress)(disasmlib, "Geterrwarnmessage"); + pPreparedisasm=(Preparedisasm_Type)(*pGetProcAddress)(disasmlib, "Preparedisasm"); + pFinishdisasm=(Finishdisasm_Type)(*pGetProcAddress)(disasmlib, "Finishdisasm"); + pDisasm=(Disasm_Type)(*pGetProcAddress)(disasmlib, "Disasm"); + OutTraceDW("DXWND: Load disasm.dll ptrs=%x,%x,%x,%x\n", pGeterrwarnmessage, pPreparedisasm, pFinishdisasm, pDisasm); + + // getting segment size + psapilib=(*pLoadLibraryA)("psapi.dll"); + if(!psapilib) { + OutTraceDW("DXWND: Load lib=\"%s\" failed err=%d\n", "psapi.dll", GetLastError()); + return; + } + pGetModuleInformation=(GetModuleInformation_Type)(*pGetProcAddress)(psapilib, "GetModuleInformation"); + (*pGetModuleInformation)(GetCurrentProcess(), GetModuleHandle(NULL), &mi, sizeof(mi)); + dwSegSize = mi.SizeOfImage; + FreeLibrary(psapilib); + + (*pPreparedisasm)(); + opcodes=(unsigned char *)GetModuleHandle(NULL); + unsigned int offset = 0; + BOOL cont = TRUE; + OutTraceDW("DXWND: opcode starting at addr=%x size=%x\n", opcodes, dwSegSize); + while (TRUE) { + int cmdlen; + __try{ + cmdlen=(*pDisasm)(opcodes+offset,20,offset,&da,0,NULL,NULL); + //OutTrace("offset=%x opcode=%x\n", offset, *(opcodes+offset)); + } + __except (EXCEPTION_EXECUTE_HANDLER){ + OutTrace("exception at offset=%x\n", offset); + cont=FALSE; + } + if (cmdlen==0) break; + // search for RDTSC opcode 0x0F31 + if((*(opcodes+offset) == 0x0F) && (*(opcodes+offset+1) == 0x31)){ + DWORD oldprot; + OutTraceDW("DXWND: RDTSC opcode found at addr=%x\n", (opcodes+offset)); + if(!VirtualProtect((LPVOID)(opcodes+offset), 4, PAGE_READWRITE, &oldprot)) { + OutTrace("VirtualProtect ERROR: target=%x err=%d at %d\n", opcodes+offset, GetLastError(), __LINE__); + return; // error condition + } + *(opcodes+offset) = 0xCC; // __asm INT3 + *(opcodes+offset+1) = 0x90; // __asm NOP + if(!VirtualProtect((LPVOID)(opcodes+offset), 4, oldprot, &oldprot)){ + OutTrace("VirtualProtect ERROR; target=%x, err=%d at %d\n", opcodes+offset, GetLastError(), __LINE__); + return; // error condition + } + } + offset+=cmdlen; + if((offset+0x10) > dwSegSize) break; + } + + return; + (*pFinishdisasm)(); + FreeLibrary(disasmlib); +} + void HookInit(TARGETMAP *target, HWND hwnd) { HMODULE base; @@ -1453,7 +1589,7 @@ void HookInit(TARGETMAP *target, HWND hwnd) dxw.SethWnd((dxw.dwFlags1 & FIXPARENTWIN) ? GetParent(hwnd) : hwnd); } - if(IsTraceDDRAW){ + if(IsTraceDW){ OutTrace("HookInit: path=\"%s\" module=\"%s\" dxversion=%s pos=(%d,%d) size=(%d,%d)", target->path, target->module, dxversions[dxw.dwTargetDDVersion], target->posx, target->posy, target->sizx, target->sizy); @@ -1461,19 +1597,6 @@ void HookInit(TARGETMAP *target, HWND hwnd) else OutTrace("\n"); } -#if 0 - if(dxw.dwFlags4 & ADDPROXYLIBS){ - #define MAX_FILE_PATH 512 - char sSourcePath[MAX_FILE_PATH+1]; - char *p; - GetModuleFileName(GetModuleHandle("dxwnd"), sSourcePath, MAX_FILE_PATH); - p=&sSourcePath[strlen(sSourcePath)-strlen("dxwnd.dll")]; - strcpy(p, "d3d9.dll"); - OutTraceDW("HookInit: copy %s -> d3d9.dll\n", sSourcePath); - CopyFile(sSourcePath, "d3d9.dll", FALSE); - } -#endif - if (hwnd && IsDebug){ DWORD dwStyle, dwExStyle; dwStyle=GetWindowLong(dxw.GethWnd(), GWL_STYLE); @@ -1487,10 +1610,14 @@ void HookInit(TARGETMAP *target, HWND hwnd) HookSysLibsInit(); // this just once... base=GetModuleHandle(NULL); - if(dxw.dwFlags3 & SINGLEPROCAFFINITY) SetSingleProcessAffinity(); - if(dxw.dwFlags1 & HANDLEEXCEPTIONS) HookExceptionHandler(); + if (dxw.dwFlags3 & SINGLEPROCAFFINITY) SetSingleProcessAffinity(); + if (dxw.dwFlags4 & INTERCEPTRDTSC) AddVectoredExceptionHandler(1, Int3Handler); // 1 = first call, 0 = call last + if (dxw.dwFlags1 & HANDLEEXCEPTIONS) HookExceptionHandler(); if (dxw.dwTFlags & OUTIMPORTTABLE) DumpImportTable(base); - //if(dxw.dwFlags2 & SUPPRESSIME) DisableIME(); + if (dxw.dwFlags2 & SUPPRESSIME) DisableIME(); + + //if ((hwnd==0) && (dxw.dwFlags4 & INTERCEPTRDTSC)) ReplaceRDTSC(); + if (dxw.dwFlags4 & INTERCEPTRDTSC) ReplaceRDTSC(); if (dxw.dwTFlags & DXPROXED){ HookDDProxy(base, dxw.dwTargetDDVersion); diff --git a/dll/dxwcore.cpp b/dll/dxwcore.cpp index eab33d5..f730c5a 100644 --- a/dll/dxwcore.cpp +++ b/dll/dxwcore.cpp @@ -388,7 +388,15 @@ void dxwCore::EraseClipCursor() void dxwCore::SethWnd(HWND hwnd) { - OutTraceDW("SethWnd: setting main win=%x\n", hwnd); + RECT WinRect; + if (pGetWindowRect){ + (*pGetWindowRect)(hwnd, &WinRect); + OutTraceDW("SethWnd: setting main win=%x pos=(%d,%d)-(%d,%d)\n", + hwnd, WinRect.left, WinRect.top, WinRect.right, WinRect.bottom); + } + else { + OutTraceDW("SethWnd: setting main win=%x\n", hwnd); + } hWnd=hwnd; hWndFPS=hwnd; } diff --git a/dll/dxwnd.cpp b/dll/dxwnd.cpp index f31070b..f92310b 100644 --- a/dll/dxwnd.cpp +++ b/dll/dxwnd.cpp @@ -24,7 +24,7 @@ along with this program. If not, see . #include "dxwnd.h" #include "dxwcore.hpp" -#define VERSION "2.02.49" +#define VERSION "2.02.50" #define DDTHREADLOCK 1 diff --git a/dll/dxwnd.vs2008.suo b/dll/dxwnd.vs2008.suo index b6b2296..7913447 100644 Binary files a/dll/dxwnd.vs2008.suo and b/dll/dxwnd.vs2008.suo differ diff --git a/dll/hd3d.cpp b/dll/hd3d.cpp index c28be5d..d05e063 100644 --- a/dll/hd3d.cpp +++ b/dll/hd3d.cpp @@ -1014,8 +1014,6 @@ HRESULT WINAPI extD3D10CreateDevice( return res; } -// -- log revised to here ... - HRESULT WINAPI extD3D10CreateDevice1( IDXGIAdapter *pAdapter, D3D10_DRIVER_TYPE DriverType, @@ -1026,10 +1024,10 @@ HRESULT WINAPI extD3D10CreateDevice1( ID3D10Device **ppDevice) { HRESULT res; - OutTraceDW("D3D10CreateDevice1: DriverType=%x Flags=%x HardwareLevel=%x SDKVersion=%x\n", DriverType, Flags, HardwareLevel, SDKVersion); + OutTraceD3D("D3D10CreateDevice1: DriverType=%x Flags=%x HardwareLevel=%x SDKVersion=%x\n", DriverType, Flags, HardwareLevel, SDKVersion); res=(*pD3D10CreateDevice1)(pAdapter, DriverType, Software, Flags, HardwareLevel, SDKVersion, ppDevice); SetHook((void *)(*(DWORD *)*ppDevice + 100), extRSSetViewports, (void **)&pRSSetViewports, "RSSetViewports(D10)"); - OutTraceDW("D3D10CreateDevice1: ret=%x\n", res); + OutTraceD3D("D3D10CreateDevice1: ret=%x\n", res); return res; } @@ -1044,12 +1042,12 @@ HRESULT WINAPI extD3D10CreateDeviceAndSwapChain( ID3D10Device **ppDevice) { HRESULT res; - OutTraceDW("D3D10CreateDeviceAndSwapChain: DriverType=%x Flags=%x SDKVersion=%x\n", DriverType, Flags, SDKVersion); + OutTraceD3D("D3D10CreateDeviceAndSwapChain: DriverType=%x Flags=%x SDKVersion=%x\n", DriverType, Flags, SDKVersion); //return 0x887a0004; pSwapChainDesc->OutputWindow = dxw.GethWnd(); pSwapChainDesc->Windowed = true; res=(*pD3D10CreateDeviceAndSwapChain)(pAdapter, DriverType, Software, Flags, SDKVersion, pSwapChainDesc, ppSwapChain, ppDevice); - OutTraceDW("D3D10CreateDeviceAndSwapChain ret=%x\n", res); + OutTraceD3D("D3D10CreateDeviceAndSwapChain ret=%x\n", res); return res; } @@ -1064,12 +1062,12 @@ HRESULT WINAPI extD3D10CreateDeviceAndSwapChain1( ID3D10Device **ppDevice) { HRESULT res; - OutTraceDW("D3D10CreateDeviceAndSwapChain1: DriverType=%x Flags=%x SDKVersion=%x\n", DriverType, Flags, SDKVersion); + OutTraceD3D("D3D10CreateDeviceAndSwapChain1: DriverType=%x Flags=%x SDKVersion=%x\n", DriverType, Flags, SDKVersion); //return 0x887a0004; pSwapChainDesc->OutputWindow = dxw.GethWnd(); pSwapChainDesc->Windowed = true; res=(*pD3D10CreateDeviceAndSwapChain1)(pAdapter, DriverType, Software, Flags, SDKVersion, pSwapChainDesc, ppSwapChain, ppDevice); - OutTraceDW("D3D10CreateDeviceAndSwapChain1 ret=%x\n", res); + OutTraceD3D("D3D10CreateDeviceAndSwapChain1 ret=%x\n", res); return res; } @@ -1086,16 +1084,16 @@ HRESULT WINAPI extD3D11CreateDevice( ID3D11DeviceContext **ppImmediateContext) { HRESULT res; - OutTraceDW("D3D11CreateDevice: DriverType=%x Flags=%x FeatureLevels=%x SDKVersion=%x\n", DriverType, Flags, FeatureLevels, SDKVersion); + OutTraceD3D("D3D11CreateDevice: DriverType=%x Flags=%x FeatureLevels=%x SDKVersion=%x\n", DriverType, Flags, FeatureLevels, SDKVersion); //return 0x887a0004; res=(*pD3D11CreateDevice)(pAdapter, DriverType, Software, Flags, pFeatureLevels, FeatureLevels, SDKVersion, ppDevice, pFeatureLevel, ppImmediateContext); if(res){ - OutTraceDW("D3D11CreateDevice: ret=%x\n", res); + OutTraceD3D("D3D11CreateDevice: ret=%x\n", res); return res; } SetHook((void *)(*(DWORD *)ppImmediateContext + 148), extRSSetViewports, (void **)&pRSSetViewports, "RSSetViewports(D11)"); //SetHook((void *)(*(DWORD *)ppImmediateContext + 152), extRSSetScissorRects, (void **)&pRSSetScissorRects, "RSSetScissorRects(D11)"); - OutTraceDW("D3D11CreateDevice ret=%x\n", res); + OutTraceD3D("D3D11CreateDevice ret=%x\n", res); return res; } @@ -1114,16 +1112,15 @@ HRESULT WINAPI extD3D11CreateDeviceAndSwapChain( ID3D11DeviceContext **ppImmediateContext) { HRESULT res; - OutTraceDW("D3D11CreateDeviceAndSwapChain\n"); - return 0x887a0004; + OutTraceD3D("D3D11CreateDeviceAndSwapChain\n"); res=(*pD3D11CreateDeviceAndSwapChain)(pAdapter, DriverType, Software, Flags, pFeatureLevels, FeatureLevels, SDKVersion, pSwapChainDesc, ppSwapChain, ppDevice, pFeatureLevel, ppImmediateContext); - OutTraceDW("D3D11CreateDeviceAndSwapChain ret=%x\n", res); + OutTraceD3D("D3D11CreateDeviceAndSwapChain ret=%x\n", res); return res; } void WINAPI extRSSetViewports(ID3D11DeviceContext *This, UINT NumViewports, D3D11_VIEWPORT *pViewports) { - OutTraceDW("RSSetViewports: NumViewports=%d\n", NumViewports); + OutTraceD3D("RSSetViewports: NumViewports=%d\n", NumViewports); if(NumViewports==1){ pViewports->TopLeftX=dxw.iPosX; @@ -1138,24 +1135,46 @@ void WINAPI extRSSetViewports(ID3D11DeviceContext *This, UINT NumViewports, D3D1 HRESULT WINAPI extQueryInterfaceD3D8(void *obj, REFIID riid, void** ppvObj) { HRESULT res; - OutTraceDW("D3D::QueryInterface(8)\n"); + OutTraceD3D("D3D::QueryInterface(8): d3d=%x riid=%x\n", obj, riid.Data1); res=pQueryInterfaceD3D8(obj, riid, ppvObj); + if(res) + OutTraceE("D3D::QueryInterface(8): ERROR ret=%x(%s)\n", res, ExplainDDError(res)); + else + OutTraceD3D("D3D::QueryInterface(8): obp=%x\n", *ppvObj); return res; } HRESULT WINAPI extQueryInterfaceDev8(void *obj, REFIID riid, void** ppvObj) { HRESULT res; - OutTraceDW("Device::QueryInterface(8)\n"); + OutTraceD3D("Device::QueryInterface(8): d3d=%x riid=%x\n", obj, riid.Data1); res=pQueryInterfaceDev8(obj, riid, ppvObj); + if(res){ + OutTraceE("Device::QueryInterface(8): ERROR ret=%x(%s)\n", res, ExplainDDError(res)); + return res; + } + OutTraceD3D("Device::QueryInterface(8): obp=%x\n", *ppvObj); + + switch(*(DWORD *)&riid){ + case 0x7385E5DF: // IID_IDirect3DDevice8 + HookD3DDevice8(ppvObj); + break; + case 0xD0223B96: // IID_IDirect3DDevice9 + HookD3DDevice9(ppvObj); + break; + } return res; } HRESULT WINAPI extQueryInterfaceD3D9(void *obj, REFIID riid, void** ppvObj) { HRESULT res; - OutTraceDW("D3D::QueryInterface(9)\n"); + OutTraceD3D("D3D::QueryInterface(9): d3d=%x riid=%x\n", obj, riid.Data1); res=pQueryInterfaceD3D9(obj, riid, ppvObj); + if(res) + OutTraceE("D3D::QueryInterface(9): ERROR ret=%x(%s)\n", res, ExplainDDError(res)); + else + OutTraceD3D("D3D::QueryInterface(9): obp=%x\n", *ppvObj); return res; } @@ -1163,13 +1182,13 @@ HRESULT WINAPI extQueryInterfaceDev9(void *obj, REFIID riid, void** ppvObj) { HRESULT res; - OutTraceDW("Device::QueryInterface(9): lpd3dd=%x refiid=%x\n", obj, riid); + OutTraceD3D("Device::QueryInterface(9): d3d=%x riid=%x\n", obj, riid.Data1); res=pQueryInterfaceDev9(obj, riid, ppvObj); if(res){ - OutTraceDW("Device::QueryInterface(9): ERROR ret=%x\n", res); + OutTraceD3D("Device::QueryInterface(9): ERROR ret=%x\n", res); return res; } - OutTraceDW("Device::QueryInterface(9): ppvObj=%x\n", *ppvObj); + OutTraceD3D("Device::QueryInterface(9): ppvObj=%x\n", *ppvObj); switch(*(DWORD *)&riid){ case 0x7385E5DF: // IID_IDirect3DDevice8 @@ -1185,32 +1204,32 @@ HRESULT WINAPI extQueryInterfaceDev9(void *obj, REFIID riid, void** ppvObj) HRESULT WINAPI extGetDirect3D(void *lpdd3dd, IDirect3D9 **ppD3D9) { - OutTraceB("Device::GetDirect3D\n"); + OutTraceD3D("Device::GetDirect3D(9): d3dd=%x\n", lpdd3dd); return (*pGetDirect3D)(lpdd3dd, ppD3D9); } HRESULT WINAPI extCheckFullScreen(void) { - OutTraceDW("CheckFullScreen\n"); + OutTraceDW("CheckFullScreen: return OK\n"); return 0; } void WINAPI extSetGammaRamp(void *lpdd3dd, UINT iSwapChain, DWORD Flags, D3DGAMMARAMP *pRamp) { - OutTraceDW("SetGammaRamp: dd3dd=%x SwapChain=%d flags=%x\n", lpdd3dd, iSwapChain, Flags); + OutTraceD3D("SetGammaRamp: dd3dd=%x SwapChain=%d flags=%x\n", lpdd3dd, iSwapChain, Flags); if (dxw.dwFlags2 & DISABLEGAMMARAMP) return; (*pSetGammaRamp)(lpdd3dd, iSwapChain, Flags, pRamp); } void WINAPI extGetGammaRamp(void *lpdd3dd, UINT iSwapChain, D3DGAMMARAMP *pRamp) { - OutTraceDW("GetGammaRamp: dd3dd=%x SwapChain=%d\n", lpdd3dd, iSwapChain); + OutTraceD3D("GetGammaRamp: dd3dd=%x SwapChain=%d\n", lpdd3dd, iSwapChain); (*pGetGammaRamp)(lpdd3dd, iSwapChain, pRamp); } void WINAPI extSetCursorPosition9(void *lpdd3dd, int X, int Y, DWORD Flags) { - OutTraceDW("SetCursorPosition: dd3dd=%x pos=(%d,%d) flags=%x\n", lpdd3dd, X, Y, Flags); + OutTraceD3D("SetCursorPosition: dd3dd=%x pos=(%d,%d) flags=%x\n", lpdd3dd, X, Y, Flags); if(dxw.dwFlags2 & KEEPCURSORFIXED) return; // to do: proper scaling..... //(*pSetCursorPosition9)(lpdd3dd, X, Y, Flags); @@ -1218,7 +1237,7 @@ void WINAPI extSetCursorPosition9(void *lpdd3dd, int X, int Y, DWORD Flags) void WINAPI extSetCursorPosition8(void *lpdd3dd, int X, int Y, DWORD Flags) { - OutTraceDW("SetCursorPosition: dd3dd=%x pos=(%d,%d) flags=%x\n", lpdd3dd, X, Y, Flags); + OutTraceD3D("SetCursorPosition: dd3dd=%x pos=(%d,%d) flags=%x\n", lpdd3dd, X, Y, Flags); if(dxw.dwFlags2 & KEEPCURSORFIXED) return; // to do: proper scaling..... //(*pSetCursorPosition8)(lpdd3dd, X, Y, Flags); @@ -1228,7 +1247,7 @@ ULONG WINAPI extAddRef9(void *lpdd3dd) { ULONG res; res=(*pAddRef9)(lpdd3dd); - OutTraceD3D("AddRef(9): dd3dd=%x res=%x\n", lpdd3dd, res); + OutTraceD3D("Device::AddRef(9): dd3dd=%x res=%x\n", lpdd3dd, res); return res; } @@ -1236,6 +1255,6 @@ ULONG WINAPI extRelease9(void *lpdd3dd) { ULONG res; res=(*pRelease9)(lpdd3dd); - OutTraceD3D("Release(9): dd3dd=%x res=%x\n", lpdd3dd, res); + OutTraceD3D("Device::Release(9): dd3dd=%x res=%x\n", lpdd3dd, res); return res; } \ No newline at end of file diff --git a/dll/hd3d7.cpp b/dll/hd3d7.cpp index 9de086d..5824da9 100644 --- a/dll/hd3d7.cpp +++ b/dll/hd3d7.cpp @@ -43,7 +43,7 @@ typedef HRESULT (WINAPI *D3DGetCaps_Type)(void *, LPD3DDEVICEDESC ,LPD3DDEVICEDE typedef HRESULT (WINAPI *SetRenderState3_Type)(void *, D3DRENDERSTATETYPE, DWORD); typedef HRESULT (WINAPI *Scene3_Type)(void *); typedef HRESULT (WINAPI *GetCaps3_Type)(void *, LPD3DDEVICEDESC, LPD3DDEVICEDESC); - +typedef HRESULT (WINAPI *SetLightState_Type)(void *, D3DLIGHTSTATETYPE, DWORD); Initialize_Type pInitialize = NULL; EnumDevices_Type pEnumDevices = NULL; @@ -70,6 +70,8 @@ Scene3_Type pEndScene3 = NULL; GetCaps3_Type pGetCaps3 = NULL; +SetLightState_Type pSetLightState3 = NULL; + D3DInitialize_Type pD3DInitialize = NULL; D3DGetCaps_Type pD3DGetCaps = NULL; @@ -99,6 +101,7 @@ HRESULT WINAPI extSetRenderState3(void *, D3DRENDERSTATETYPE, DWORD); HRESULT WINAPI extBeginScene3(void *); HRESULT WINAPI extEndScene3(void *); HRESULT WINAPI extGetCaps3(void *, LPD3DDEVICEDESC, LPD3DDEVICEDESC); +HRESULT WINAPI extSetLightState3(void *d3dd, D3DLIGHTSTATETYPE d3dls, DWORD t); extern char *ExplainDDError(DWORD); @@ -239,6 +242,7 @@ void HookDirect3DDevice(void **lpd3ddev, int dxversion) SetHook((void *)(**(DWORD **)lpd3ddev + 36), extBeginScene3, (void **)&pBeginScene3, "BeginScene(3)"); SetHook((void *)(**(DWORD **)lpd3ddev + 40), extEndScene3, (void **)&pEndScene3, "EndScene(3)"); SetHook((void *)(**(DWORD **)lpd3ddev + 88), extSetRenderState3, (void **)&pSetRenderState3, "SetRenderState(3)"); + SetHook((void *)(**(DWORD **)lpd3ddev + 96), extSetLightState3, (void **)&pSetLightState3, "SetLightState(3)"); if(pSetRenderState3){ if(dxw.dwFlags2 & WIREFRAME)(*pSetRenderState3)(*lpd3ddev, D3DRENDERSTATE_FILLMODE, D3DFILL_WIREFRAME); if(dxw.dwFlags4 & DISABLEFOGGING) (*pSetRenderState3)(*lpd3ddev, D3DRENDERSTATE_FOGENABLE, FALSE); @@ -739,3 +743,12 @@ HRESULT WINAPI extGetCaps3(void *d3dd, LPD3DDEVICEDESC hd, LPD3DDEVICEDESC sd) } return res; } + +HRESULT WINAPI extSetLightState3(void *d3dd, D3DLIGHTSTATETYPE d3dls, DWORD t) +{ + HRESULT res; + OutTraceD3D("SetLightState(3): d3d=%x lightstate=%x t=%x\n", d3dd, d3dls, t); + res=(*pSetLightState3)(d3dd, d3dls, t); + if(res) OutTraceE("SetLightState(3): ERROR res=%x(%s)\n", res, ExplainDDError(res)); + return res; +} diff --git a/dll/syslibs.h b/dll/syslibs.h index 2d78da2..ca48113 100644 --- a/dll/syslibs.h +++ b/dll/syslibs.h @@ -181,6 +181,7 @@ typedef BOOL (WINAPI *SetWindowPlacement_Type)(HWND, WINDOWPLACEMENT *); typedef HWND (WINAPI *SetCapture_Type)(HWND); typedef HWND (WINAPI *GetForegroundWindow_Type)(void); typedef HWND (WINAPI *GetActiveWindow_Type)(void); +typedef BOOL (WINAPI *IsWindowVisible_Type)(HWND); // Winmm.dll: typedef MCIERROR(WINAPI *mciSendCommand_Type)(MCIDEVICEID, UINT, DWORD_PTR, DWORD_PTR); @@ -369,6 +370,7 @@ DXWEXTERN SetWindowPlacement_Type pSetWindowPlacement DXWINITIALIZED; DXWEXTERN SetCapture_Type pSetCapture DXWINITIALIZED; DXWEXTERN GetForegroundWindow_Type pGetForegroundWindow DXWINITIALIZED; DXWEXTERN GetActiveWindow_Type pGetActiveWindow DXWINITIALIZED; +DXWEXTERN IsWindowVisible_Type pIsWindowVisible DXWINITIALIZED; // Winmm.dll: DXWEXTERN mciSendCommand_Type pmciSendCommand DXWINITIALIZED; @@ -555,6 +557,7 @@ extern BOOL WINAPI extSetWindowPlacement(HWND, WINDOWPLACEMENT *); extern HWND WINAPI extSetCapture(HWND); extern HWND WINAPI extGetForegroundWindow(void); extern HWND WINAPI extGetActiveWindow(void); +extern BOOL WINAPI extIsWindowVisible(HWND); // Winmm.dll: extern MCIERROR WINAPI extmciSendCommand(MCIDEVICEID, UINT, DWORD_PTR, DWORD_PTR); diff --git a/dll/user32.cpp b/dll/user32.cpp index e3b1e52..ba15b7c 100644 --- a/dll/user32.cpp +++ b/dll/user32.cpp @@ -44,6 +44,7 @@ static HookEntry_Type Hooks[]={ //{"GetActiveWindow", (FARPROC)NULL, (FARPROC *)&pGetActiveWindow, (FARPROC)extGetActiveWindow}, //{"GetForegroundWindow", (FARPROC)NULL, (FARPROC *)&pGetForegroundWindow, (FARPROC)extGetForegroundWindow}, + {"IsWindowVisible", (FARPROC)NULL, (FARPROC *)&pIsWindowVisible, (FARPROC)extIsWindowVisible}, {0, NULL, 0, 0} // terminator }; @@ -724,12 +725,16 @@ BOOL WINAPI extSetWindowPos(HWND hwnd, HWND hWndInsertAfter, int X, int Y, int c // useful??? to be demonstrated.... // when altering main window in fullscreen mode, fix the coordinates for borders - DWORD dwCurStyle; + DWORD dwCurStyle, dwExStyle; + HMENU hMenu; RECT rect; rect.top=rect.left=0; rect.right=cx; rect.bottom=cy; dwCurStyle=(*pGetWindowLong)(hwnd, GWL_STYLE); - AdjustWindowRect(&rect, dwCurStyle, FALSE); + dwExStyle=(*pGetWindowLong)(hwnd, GWL_EXSTYLE); + hMenu = GetMenu(hwnd); + AdjustWindowRectEx(&rect, dwCurStyle, (hMenu!=NULL), dwExStyle); + if (hMenu) CloseHandle(hMenu); cx=rect.right; cy=rect.bottom; OutTraceDW("SetWindowPos: main form hwnd=%x fixed size=(%d,%d)\n", hwnd, cx, cy); @@ -831,6 +836,7 @@ BOOL WINAPI extGetCursorPos(LPPOINT lppoint) prev=*lppoint; *lppoint=dxw.ScreenToClient(*lppoint); *lppoint=dxw.FixCursorPos(*lppoint); + GetHookInfo()->CursorX=(short)lppoint->x; GetHookInfo()->CursorY=(short)lppoint->y; OutTraceC("GetCursorPos: FIXED pos=(%d,%d)->(%d,%d)\n", prev.x, prev.y, lppoint->x, lppoint->y); @@ -1313,13 +1319,13 @@ HWND WINAPI extCreateWindowExW( HINSTANCE hInstance, LPVOID lpParam) { - if(IsTraceDDRAW){ + if(IsTraceDW){ char xString[20], yString[20]; if (x==CW_USEDEFAULT) strcpy(xString,"CW_USEDEFAULT"); else sprintf(xString,"%d", x); if (y==CW_USEDEFAULT) strcpy(yString,"CW_USEDEFAULT"); else sprintf(yString,"%d", y); - OutTraceDW("CreateWindowExW: class=\"%ls\" wname=\"%ls\" pos=(%s,%s) size=(%d,%d) Style=%x(%s) ExStyle=%x(%s)\n", + OutTrace("CreateWindowExW: class=\"%ls\" wname=\"%ls\" pos=(%s,%s) size=(%d,%d) Style=%x(%s) ExStyle=%x(%s)\n", lpClassName, lpWindowName, xString, yString, nWidth, nHeight, dwStyle, ExplainStyle(dwStyle), dwExStyle, ExplainExStyle(dwExStyle)); } @@ -1343,19 +1349,19 @@ HWND WINAPI extCreateWindowExA( HINSTANCE hInstance, LPVOID lpParam) { - if(IsTraceDDRAW){ + if(IsTraceDW){ char xString[20], yString[20]; if (x==CW_USEDEFAULT) strcpy(xString,"CW_USEDEFAULT"); else sprintf(xString,"%d", x); if (y==CW_USEDEFAULT) strcpy(yString,"CW_USEDEFAULT"); else sprintf(yString,"%d", y); - OutTraceDW("CreateWindowExA: class=\"%s\" wname=\"%s\" pos=(%s,%s) size=(%d,%d) Style=%x(%s) ExStyle=%x(%s)\n", + OutTrace("CreateWindowExA: class=\"%s\" wname=\"%s\" pos=(%s,%s) size=(%d,%d) Style=%x(%s) ExStyle=%x(%s)\n", ClassToStr(lpClassName), lpWindowName, xString, yString, nWidth, nHeight, dwStyle, ExplainStyle(dwStyle), dwExStyle, ExplainExStyle(dwExStyle)); } if(IsDebug) OutTrace("CreateWindowExA: DEBUG screen=(%d,%d)\n", dxw.GetScreenWidth(), dxw.GetScreenHeight()); - return extCreateWindowCommon("CreateWindowExA", false, dwExStyle, (void *)lpClassName, (void *)lpWindowName, dwStyle, x, y, nWidth, nHeight, hWndParent, hMenu, hInstance, lpParam); + return extCreateWindowCommon("CreateWindowExA", FALSE, dwExStyle, (void *)lpClassName, (void *)lpWindowName, dwStyle, x, y, nWidth, nHeight, hWndParent, hMenu, hInstance, lpParam); } LRESULT WINAPI extCallWindowProc(WNDPROC lpPrevWndFunc, HWND hwnd, UINT Msg, WPARAM wParam, LPARAM lParam) @@ -2080,4 +2086,16 @@ HWND WINAPI extGetForegroundWindow(void) OutTraceDW("GetForegroundWindow: ret=%x\n", ret); STOPPER("GetForegroundWindow"); return ret; -} \ No newline at end of file +} + +BOOL WINAPI extIsWindowVisible(HWND hwnd) +{ + BOOL ret; + ret=(*pIsWindowVisible)(hwnd); + OutTraceDW("IsWindowVisible: hwnd=%x ret=%x\n", hwnd, ret); + if(dxw.IsDesktop(hwnd)){ + OutTraceDW("IsWindowVisible: FORCING ret=TRUE\n"); + ret=TRUE; + } + return ret; +} diff --git a/host/Resource.h b/host/Resource.h index a5050db..db1583a 100644 --- a/host/Resource.h +++ b/host/Resource.h @@ -195,6 +195,7 @@ #define IDC_OUTDEBUG 1158 #define IDC_OUTREGISTRY 1159 #define IDC_ADDPROXYLIBS 1160 +#define IDC_INTERCEPTRDTSC 1161 #define ID_MODIFY 32771 #define ID_DELETE 32772 #define ID_ADD 32773 diff --git a/host/TabTiming.cpp b/host/TabTiming.cpp index e3a3c84..050d326 100644 --- a/host/TabTiming.cpp +++ b/host/TabTiming.cpp @@ -34,6 +34,7 @@ void CTabTiming::DoDataExchange(CDataExchange* pDX) DDX_Check(pDX, IDC_SHOWFPSOVERLAY, cTarget->m_ShowFPSOverlay); DDX_Check(pDX, IDC_SHOWTIMESTRETCH, cTarget->m_ShowTimeStretch); DDX_Check(pDX, IDC_TIMESTRETCH, cTarget->m_TimeStretch); + DDX_Check(pDX, IDC_INTERCEPTRDTSC, cTarget->m_InterceptRDTSC); DDX_Text(pDX, IDC_MAXFPS, cTarget->m_MaxFPS); DDX_LBIndex(pDX, IDC_LISTTS, cTarget->m_InitTS); //{{AFX_DATA_MAP(CTabTiming) diff --git a/host/TargetDlg.cpp b/host/TargetDlg.cpp index 3b21729..583f951 100644 --- a/host/TargetDlg.cpp +++ b/host/TargetDlg.cpp @@ -120,6 +120,7 @@ CTargetDlg::CTargetDlg(CWnd* pParent /*=NULL*/) m_ShowFPSOverlay = FALSE; m_ShowTimeStretch = FALSE; m_TimeStretch = FALSE; + m_InterceptRDTSC = FALSE; m_HookOpenGL = FALSE; m_ForceHookOpenGL = FALSE; m_FakeVersion = FALSE; diff --git a/host/TargetDlg.h b/host/TargetDlg.h index 481d228..a1705c1 100644 --- a/host/TargetDlg.h +++ b/host/TargetDlg.h @@ -103,6 +103,7 @@ public: BOOL m_ShowFPSOverlay; BOOL m_ShowTimeStretch; BOOL m_TimeStretch; + BOOL m_InterceptRDTSC; BOOL m_HookOpenGL; BOOL m_ForceHookOpenGL; BOOL m_FakeVersion; diff --git a/host/dxwndhost.aps b/host/dxwndhost.aps index b9b4f78..6b0a4ac 100644 Binary files a/host/dxwndhost.aps and b/host/dxwndhost.aps differ diff --git a/host/dxwndhost.rc b/host/dxwndhost.rc index 7bae9e6..ea44755 100644 --- a/host/dxwndhost.rc +++ b/host/dxwndhost.rc @@ -392,8 +392,9 @@ BEGIN CONTROL "Show FPS overlay",IDC_SHOWFPSOVERLAY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,12,72,84,10 EDITTEXT IDC_MAXFPS,104,23,31,14,ES_AUTOHSCROLL | ES_NUMBER,WS_EX_RIGHT LISTBOX IDC_LISTTS,104,104,31,55,LBS_NOINTEGRALHEIGHT | WS_VSCROLL | WS_TABSTOP - GROUPBOX "Time Stretching",IDC_STATIC,7,94,139,71 + GROUPBOX "Time Stretching",IDC_STATIC,7,94,139,102 CONTROL "Show time stretch",IDC_SHOWTIMESTRETCH,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,12,134,84,10 + CONTROL "Intercept RDTSC opcode",IDC_INTERCEPTRDTSC,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,12,164,127,10 END IDD_TAB_OUTPUT DIALOGEX 0, 0, 300, 240 diff --git a/host/dxwndhost.vs2008.suo b/host/dxwndhost.vs2008.suo index 4eb07bf..41d0bf3 100644 Binary files a/host/dxwndhost.vs2008.suo and b/host/dxwndhost.vs2008.suo differ diff --git a/host/dxwndhostView.cpp b/host/dxwndhostView.cpp index 9078696..60df71f 100644 --- a/host/dxwndhostView.cpp +++ b/host/dxwndhostView.cpp @@ -228,6 +228,7 @@ static void SetTargetFromDlg(TARGETMAP *t, CTargetDlg *dlg) if(dlg->m_ShowFPSOverlay) t->flags2 |= SHOWFPSOVERLAY; if(dlg->m_ShowTimeStretch) t->flags4 |= SHOWTIMESTRETCH; if(dlg->m_TimeStretch) t->flags2 |= TIMESTRETCH; + if(dlg->m_InterceptRDTSC) t->flags4 |= INTERCEPTRDTSC; if(dlg->m_HookOpenGL) t->flags2 |= HOOKOPENGL; if(dlg->m_ForceHookOpenGL) t->flags3 |= FORCEHOOKOPENGL; if(dlg->m_WireFrame) t->flags2 |= WIREFRAME; @@ -376,6 +377,7 @@ static void SetDlgFromTarget(TARGETMAP *t, CTargetDlg *dlg) dlg->m_ShowFPSOverlay = t->flags2 & SHOWFPSOVERLAY ? 1 : 0; dlg->m_ShowTimeStretch = t->flags4 & SHOWTIMESTRETCH ? 1 : 0; dlg->m_TimeStretch = t->flags2 & TIMESTRETCH ? 1 : 0; + dlg->m_InterceptRDTSC = t->flags4 & INTERCEPTRDTSC ? 1 : 0; dlg->m_HookOpenGL = t->flags2 & HOOKOPENGL ? 1 : 0; dlg->m_ForceHookOpenGL = t->flags3 & FORCEHOOKOPENGL ? 1 : 0; dlg->m_WireFrame = t->flags2 & WIREFRAME ? 1 : 0;